Using the Cortex M0 cores?

Board based on the Rockchip RK3399 - ARM Cortex-A72 Dual-core up to 1.8GHz + Cortex A53 Quad-core up to 1.4GHz

Ooops sorry for the first message!

I’m doing some bare metal coding on the Rock960 and would like to use the PERILPM0 core on the Cortex-M0. To do that I would need to remap its memory. The Rockchip TRM for the RK3399, in section 7 has some tables describing how to remap memory. The problem is the tables reference GRF registers for which there is no documentation. For example, in Table 7.2 it calls out [31:28]: sgrf_perilp_m0_con7[3:0] and [27:12]: sgrf_perilp_m0_con3[15:0] for use to remap memory starting at 0x0. But nowhere in either part 1 or part 2 of the TRM are the registers sgrf_perilp_m0_con3 or sgrf_perilp_mo_con7 locations defined.

Any ideas on where to find data relating to these registers?

Bob Stewart

Hi @Bob_Stewart

Sorry, we never had any info on using the PERILPM0 M0 core of rk3399. Since it is not Rock960 specific, I think you should contact Rockchip directly. AFAIK, they never released any open reference sdk for that core.


Thanks for the info, Mani. I’ll try Rockchip directly.

Bob Stewart