I was wondering if anyone knew where the TZ Registers that configure the memory to secure or non secure are located at in OP-TEE?
This is not officially done in OP-TEE, but ARM Trusted Firmware . However, this is just reference code from the board vendor. The documentation is not available to the public (see  for related discussions). For a similar but unofficial implementation in OP-TEE, see . The HW IP used in the HiKey board for this doesn’t seem to be fully compatible with TZASC though, so for better TZASC reference implementations (on Juno and FVP), see .