there is a TZC-400 on the board which can be used to partition the DRAM
Yes, but there’s no doc on it too. Also, afaik it’s something similar to a TZASC but not exactly a TZC-400.
there is no on-SoC SRAM on the board
Sorry, not sure about this. I know there is SRAM, but not sure if it’s on-SoC or not.
there is a TZPC on the board but there is no documentation on it
And a short follow up question. When we cannot use the TZPC (or only for UART3), doesn’t that mean that peripherals connected on the AXI-to-APB Bridge can only be configured as secure or non-secure statically, which e.g. means I can never implement a secure input?
Sorry, not sure I follow you. You can use the TZPC to secure UART3. Sample code is in https://github.com/OP-TEE/optee_os/issues/1065, but I think Normal World can revert the setting, because the code to ‘lock down’ this operation is not disclosed. Still, you can use the sample code for testing and development. Since this is a dev board only, the hope is that users can port the reference code to their own product/platform where they would have the ability to do the final ‘lock down’.