Trouble booting to UEFI

Products Support Developerbox
#1

I recently purchased the board standalone rather than the whole system, and have not been able to progress through to UEFI. Below are the outputs from each console. I had to update the SCP to upstream as the factory build, and the updated 20180226-LB1.1-ACPI-ramfw.bin did not support my DRAM. I’ve tried various snapshots from linaro.org as well as building arm trusted firmware, and UEFI from source, but this is as far as it ever gets.

Output from LPUART console

    [    1.845458]  ___  ___ ___      __ _
    [    1.848934] / __|/ __| _ \___ / _(_)_ _ _ ____ __ ____ _ _ _ ___
    [    1.854946] \__ | (__|  _|___|  _| | '_| '  \ V  V / _` | '_/ -_)
    [    1.861039] |___/\___|_|     |_| |_|_| |_|_|_\_/\_/\__,_|_| \___|
    [    1.867132]
    [    1.868608] v2.7.0_2021-02-27_12-32-07-v2.7.0-189-g93d8145d
    [    1.874182]
    [    1.875658] [scmi_vendor_ext] process bind request.
    [    1.880652] [PPUV0] get state reg=0x0x50021000 (0x1)
    [    1.885664] [PPUV0] get state reg=0x0x50043000 (0x1)
    [    1.890677] [PPUV0] get state reg=0x0x50042000 (0x1)
    [    1.895691] [PPUV0] get state reg=0x0x50044000 (0x1)
    [    1.900705] [PPUV0] get state reg=0x0x501c1000 (0x0)
    [    1.905685] [PPUV0] get state reg=0x0x501a1000 (0x0)
    [    1.910664] [PPUV0] get state reg=0x0x50181000 (0x0)
    [    1.915642] [PPUV0] get state reg=0x0x50161000 (0x0)
    [    1.920621] [PPUV0] get state reg=0x0x50141000 (0x0)
    [    1.925600] [PPUV0] get state reg=0x0x50121000 (0x0)
    [    1.930578] [PPUV0] get state reg=0x0x50101000 (0x0)
    [    1.935557] [PPUV0] get state reg=0x0x500e1000 (0x0)
    [    1.940536] [PPUV0] get state reg=0x0x500c1000 (0x0)
    [    1.945514] [PPUV0] get state reg=0x0x500a1000 (0x0)
    [    1.950493] [PPUV0] get state reg=0x0x50081000 (0x0)
    [    1.955472] [PPUV0] get state reg=0x0x50061000 (0x0)
    [    1.960636] [SYNQUACER SYSTEM] chip version 2.
    [    1.965059] [SYSTEM] Initializing power domain
    [    1.969498] [PowerDomain] Socionext-PPU initialize .
    [    1.974518] [PowerDomain] Socionext-PPU initialize end .
    [    1.979795] [PowerDomain] PowerDomain All-ON start.
    [    1.985484] [PPU] sni-pmu timeout expected:(0xfffffc00) result: (0xfffc0000).
    [    1.992697] [PowerDomain] Opening transaction switch
    [    1.997625] [PowerDomain] Opening transaction switch + 0
    [    2.002934]   traSW disable_bit =  00000003
    [    2.007118] [PowerDomain] Finished opening transaction switch + 0
    [    2.013209] [PowerDomain] Opening transaction switch + 1
    [    2.018519]   traSW disable_bit =  00000007
    [    2.022702] [PowerDomain] Finished opening transaction switch + 1
    [    2.028794] [PowerDomain] Opening transaction switch + 2
    [    2.034104]   traSW disable_bit =  00000007
    [    2.038286] [PowerDomain] Finished opening transaction switch + 2
    [    2.044379] [PowerDomain] Opening transaction switch + 3
    [    2.049688]   traSW disable_bit =  00000003
    [    2.053871] [PowerDomain] Finished opening transaction switch + 3
    [    2.059963] [PowerDomain] Finished transaction switch
    [    2.065011] [PowerDomain] PowerDomain All-ON finished.
    [    2.070167] nic_sec_slave_security addr 0xca10001c value 0x00000001
    [    2.076497] nic_sec_slave_security addr 0x70100008 value 0x00000001
    [    2.082825] nic_sec_slave_security addr 0x7f000008 value 0x00000003
    [    2.089158] nic_sec_slave_security addr 0x7f400008 value 0x00000003
    [    2.095490] nic_sec_slave_security addr 0x7f80000c value 0x00000001
    [    2.101822] nic_sec_slave_security addr 0x75000010 value 0x00000001
    [    2.108150] nic_sec_slave_security addr 0x75000014 value 0x00000001
    [    2.114478] nic_sec_slave_security addr 0x72600008 value 0x00000001
    [    2.120805] nic_sec_slave_security addr 0x72600014 value 0x00000001
    [    2.127133] nic_sec_slave_security addr 0x72600018 value 0x00000007
    [    2.133461] [THERMAL] Thermal enable start
    [    2.137826] [THERMAL] Thermal enable end
    [    2.141712] [SYSTEM] Starting check DRAM
    [    2.145847] [SYSTEM] slot DIMM0: not detected
    [    2.156232] [SYSTEM] slot DIMM1: 8192MB UDIMM non-ECC
    [    2.161600] [SYSTEM] slot DIMM2: not detected
    [    2.171986] [SYSTEM] slot DIMM3: 8192MB UDIMM non-ECC
    [    2.177100] [SYSTEM] Finished check DRAM memory total 16GB
    [    2.187389] [SYNQUACER SYSTEM] Request system initialization.
    [    2.193232] [CCN512] Initialising ccn512 at 0xd2000000
    [    2.198406] [CCN512] CCN512 init done.
    [    2.202110] [DDR] 2133MHz
    [    2.204724] [DDR] Initializing DDR ch0
    [    2.210145] [DDR] Finished initializing DDR ch0
    [    2.214634] [DDR] Initializing DDR ch1
    [    2.220074] [DDR] Finished initializing DDR ch1
    [    2.224588] [DDR] DRAM ECC disabled
    [    2.229175] [SYSTEM] slot DIMM0: not detected
    [    2.257597] [SYSTEM] slot DIMM2: not detected
    [    2.285772] [SYNQUACER MEMC] DMC init done.
    [    2.289994] [FWK] Module initialization complete!
    [    2.294810] [SYNQUACER SYSTEM] Process system start event.
    [    2.300269] Configure System MMUs starts
    [    2.315812] [MMU500] setup PMU for MMU-500@0x78280000. page_size=4096. 0x7828
    [    2.323057] Configure System MMUs finished
    [    2.327158] [SYSTEM] Setting up PRMUX
    [    2.330807] [SYSTEM] Finished setting up PRMUX
    [    2.335241] [SYSTEM] Setting up GPIO
    [    2.338816] [SYSTEM] Finished setting up GPIO
    [    2.343164] [SYSTEM] Initial GPIO input values = 0x00ff8300:
    [    2.348916] pcie1-ep-detected
    [    2.351973] [HS-SPI] Configuring HS-SPI controller with clk_sel=0 clk_div=4 s
    [    2.360307] [HS-SPI] CS#0: Manufacturer ID:c2, DeviceID:253a
    [    2.366028] [HS-SPI] Configuring Quad-Output-Fast-Read mode
    [    2.371592] [SYNQUACER SYSTEM] Finished initializing HS-SPI controller.
    [    2.378191] [SYNQUACER SYSTEM] Arm tf load start.
    [    2.382895] [FIP] fip_toc_entry[0] offset_addr lx
    [    2.387608] [FIP] fip_toc_entry[0] size        lu
    [    2.392318] [FIP] dst addr[0]                  a4000000
    [    2.397560] [FIP] src addr[0]                  a81800b0
    [    2.424223] [FIP] fip_toc_entry[1] offset_addr lx
    [    2.428939] [FIP] fip_toc_entry[1] size        lu
    [    2.433649] [FIP] dst addr[1]                  a4013000
    [    2.438891] [FIP] src addr[1]                  a8187119
    [    2.465561] [FIP] fip_toc_entry[2] offset_addr lx
    [    2.470274] [FIP] fip_toc_entry[2] size        lu
    [    2.474984] [FIP] dst addr[2]                  a401f000
    [    2.480226] [FIP] src addr[2]                  a818e182
    [    2.506894] [SYNQUACER SYSTEM] Arm tf load end.
    [    2.511389] [SYNQUACER SYSTEM] powering up AP
    [    2.515782] [SYNQUACER SYSTEM] finished powering up AP
    [    2.521305] [PPUV0] set_state start. reg=(0x0x50061000) state=(0x1)
    [    2.527635] [PPUV0] set_state end. reg=(0x0x50061000) state=(0x1)
    [    2.533920] [PPUV0] set_state start. reg=(0x0x50062000) state=(0x1)
    [    2.540251] [PPUV0] set_state end. reg=(0x0x50062000) state=(0x1)
    [    2.550676] [SMT] Mailbox ownership error on channel 0

From the microUSB console:

    NOTICE:  BL31: v2.4(release):v2.4-405-g0aa70f4c4
    NOTICE:  BL31: Built : 11:32:30, Feb 27 2021
#2

We are very sorry for keeping this query not replied long time.

Possible reason is missing build option for trusted firmware.
As described in the build procedure,

SQ_USE_SCMI_DRIVER=1 must be added when the self-build SCP-firmware is used.

Could you clone the latest SCP-firmware and trusted firmware-a,
and build trusted firmware-a with SQ_USE_SCMI_DRIVER=1 option?

In addition, if you use two DIMMs, could you set two DIMMs with the combination
of DIMM1&DIMM2 or DIMM3&DIMM4?

#3

Hi Masahisak,

SQ_USE_SCMI_DRIVER=1 must be added when the self-build SCP-firmware is used.
Could you clone the latest SCP-firmware and trusted firmware-a,
and build trusted firmware-a with SQ_USE_SCMI_DRIVER=1 option?

This occurs with both the supplied firmware’s and self-built. I will try building with these options and report back.

In addition, if you use two DIMMs, could you set two DIMMs with the combination
of DIMM1&DIMM2 or DIMM3&DIMM4?

I did try that. Since my original post I have obtained 4 MTA18ASF2G72PDZ RDIMMs and have tried various combinations and the result was slightly different, but I will have to set up the LPUART console to get the results to post here, which I will do in combination with the above advice about the SQ_USE_SCMI_DRIVER=1 environment variable

#4

console to get the results to post here, which I will do in combination with the above advice about the SQ_USE_SCMI_DRIVER=1 environment variable

If you still encounter error, please add “DEBUG=1” build option for trusted firmware-a.
It will output helpful information to understand the problem.

#5

If you still encounter error, please add “DEBUG=1” build option for trusted firmware-a.
It will output helpful information to understand the problem.

Thanks, this helped diagnose part of my problem with one of the MTA18ASF2G72PDZ RDIMMs being bad, the rest of the issue was solved with SQ_USE_SCMI_DRIVER=1