Secondary CPU reset



I am writing a baremetal kernel and have managed to load my image using u-boot from:

I have managed to load binary image using tftp to address 0x9000_0000 and entered my kernel using the go 0x9000000 command.

However, I am not able to get the secondary cpus to jump into my code.
I have tried programming the GICv2 on the board to generate SGI interrput, but this does not seem to wake up other CPUS. In fact I don’t even see the pending bits turn on. So, my programming may be off. I need to relook at this code.

To confuse things more, Linux seems to think that GICD_BASE is at 0xB00_0000 whereas the qualcomm register manual indicates that the GICD_BASE is at 0xA20_A000. Which is the right address?
Read of the ID register at (base + 0xFE8) yeilds 0x0 for both the bases.

Does anyone know what fastboot does with the secondary CPUS? How do we get it to enter u-boot?



I have managed to get the cpus to wake up and run.
I have documented it here(

Leaving it here so that someone searching the forum can find it.