MIPI-DSI lane swapping


#1

I’m designing a MIPI-DSI mezzanine for a specific DSI panel we want to use. As this is my first high-speed layout, I want to respect design guidelines as much as possible, including the recommendation to keep all DSI signals on the same PCB layer. However, the connector layout of my panel doesn’t match that of the high speed connector in such a way that I route the signals without having signals crossing eachother. Now if only I could swap two pairs of lanes, I would be fine. So i found some support for DSI lane swapping in different (Qualcomm) kernel patches, but my Linux knowledge at this point is still too little to be confident I can swap lanes at will.

https://patchwork.kernel.org/patch/7118451/
here it called dsi-logical-lane-swap

https://android.googlesource.com/kernel/msm/+/android-wear-5.0.2_r0.1/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
here it is called mdss-dsi-lane-map

https://android.googlesource.com/kernel/msm/+/android-7.1.0_r0.2/Documentation/devicetree/bindings/fb/mdss-dsi.txt
here it is just lane-map


this seems to look right.

So yeah it kind of seems that it is possible, but why is it all named differently and what am I expected to do once by board with swapped lanes is ready?

Thanks


#2

Hi @Genoil

Yes you can swap the lanes around. If you are only using 1,2 or 3 lanes then you can use any 3 you like, and put them in any order you like. if you are using all 4 lanes there are some restrictions (only 8 of the 24 possible orders are available). After you get your board back, as part of the display bring-up you need to make some changes to the source code to tell the 410 chip what lanes you have connected, what order they are connected and what you have them connected to.

I am more of a HW designer so I am not 100% familiar with the SW changes you need to make, but once you have things set up let us know and I am sure someone will help you out.

Full disclosure: I am an employee of Qualcomm Canada, any opinions I have expressed in this or any other post may not reflect the opinions of my employer.


#3

Thanks, I have my adapter/driver PCB design being made at the moment and i designed it with lane swapping required so Im happy to see my assumptions confirmed. Once I get the boards back and built one I’ll probably have more questions. The panel supplier didn’t exactly give me drop-in Linux compatible code, just a big chunk of DCS bytecode :grimacing:


#4

HI Genoil,

Yes, Lane swapping is possible.
We need this swapping, if host and panel have different mapping.

Lane0 -> lane3
Lane1 -> lane2
Lane2-> lane1
Lane3-> lane0

You can swap the lane by configuring the dtsi file with below information.

  • qcom,mdss-dsi-lane-0-state: Boolean that specifies whether data lane 0 is enabled.
  • qcom,mdss-dsi-lane-1-state: Boolean that specifies whether data lane 1 is enabled.
  • qcom,mdss-dsi-lane-2-state: Boolean that specifies whether data lane 2 is enabled.
  • qcom,mdss-dsi-lane-3-state: Boolean that specifies whether data lane 3 is enabled.
  • qcom,mdss-dsi-lane-map: Specifies the data lane swap configuration.
    “lane_map_0123” = <0 1 2 3> (default value)
    “lane_map_3012” = <3 0 1 2>
    “lane_map_2301” = <2 3 0 1>
    “lane_map_1230” = <1 2 3 0>
    “lane_map_0321” = <0 3 2 1>
    “lane_map_1032” = <1 0 3 2>
    “lane_map_2103” = <2 1 0 3>
    “lane_map_3210” = <3 2 1 0>

#5

Hi @ramesh-bura, thanks for your answer. I wonder, is polarity swapping on the high speed connector DSI pins also an option? Couldn’t find it anywhere in dtsi but this would make routing to the display assembly I am targetting so much easier.


#6

Hi @Genoil

The MIPI CSI-2 Spec does not permit swapping the P and N signals. When in LP-Tx mode there are 4 possible states of P and N of which 3 are used, Mark-0, Mark-1 and Space. These 3 states are encoded by driving the P and N signals to the rails. If you swapped P and N then Mark-0 and Mark-1 would be swapped, and Space would go into the invalid state. Sorry, you can’t swap the P and N signals on MIPI lanes.

As @ramesh-bura has shown you can put the lanes in order ascending or descending, and then you can rotate the lanes. This gives you 8 options out of the 24 possible (2 orders times 4 rotations).

Full disclosure: I am an employee of Qualcomm Canada, any opinions I have expressed in this or any other post may not reflect the opinions of my employer.


#7

Thanks. The problem is that as it is my first high speed design, i want to keep to the high speed design rules as much as possible, so correct track impedance, no lane crossing, no vias, etc. etc. So i’m routing everything on the mezzanine bottom, which is kind of nice because i can then fold the panel FPC back over the mezzanine to have a compact assembly. But, there is not that much space available on a mezzanine bottom so there is really only a single possible location/orientation of the destination FPC connector. Only, now all the polarities are cross-wired, unless i make a 180 degrees detour for each signal pair. The latter again isn’t helping to get the track lengths identical, and finally I use Autodesk Eagle so I have to most of this without help from the software. So yeah, tough…


#8

Got the panel to work with lane swapping on the DB410C. Now, for GPU performance reasons, we would like to change to Hikey 960. It seems that one doesn’t support lane swapping, does it? Unfortunately we can’t use DB820C because of the form factor.


#9

Hi @Genoil

You could work with Arrow to get the gerbers and BOM for the 820c board. This board was designed to be ‘cut down’ to the smaller CE form factor. in the process you will loose the ‘features’ on the extended area (7 channel analog audio, GigEthernet, M.2 PCIe slot) but the base board will be fully functional. We didn’t build this variant, because the 820c is a community board intended to support SW developers.

The 820c also a useful building block to get your HW up and running, but wasn’t really intended to physically fit into any particular product. We assumed that you would build your own boards with all of the devices you want on the board to optimize cost.

Full Disclosure: I am currently an employee of Qualcomm Canada and any opinions I may have left in this or any other post do not necessarily match the opinions of my employer. As of May 22nd/2018 I will no longer be employed by Qualcomm Canada. Currently looking for new opportunities, you can contact my personal email through the forums at 96Boards.


#10

Thanks! Could you literally saw the extended part off a regular 820C?

Meanwhile I’ve found a possible lane swapping solution panel-side which I should be able to verify with the DB410C.

Until I learn how to work with SOMs, the 96boards small form factor is perfect.


#11

Hi @Genoil

it is literally, just sawing off the extended area, but not physically sawing it off. if you were to use a hacksaw on the PCB several bad things would happen:

  1. when cutting through the many layers on the board you would almost certainly leave many shorts between planes inside the board (tiny whiskers of copper that would cause electrical shorts)
  2. there are a few tracks that you need that go out into the extended area and back. If you were using the CAD tools, once you removed the extended components and their tracks, there is room to route the final tracks in the main area
  3. you would have no power connector left. There is an area in the small area to put the power connector (no components in the way), but you need the CAD tools to move the power connector and input capacitor.
  4. the physical stresses of hacksawing would likely break components.

Full Disclosure: I am currently an employee of Qualcomm Canada and any opinions I may have left in this or any other post do not necessarily match the opinions of my employer. As of May 22nd/2018 I will no longer be employed by Qualcomm Canada. Currently looking for new opportunities, you can contact my personal email through the forums at 96Boards.


#12

The panel-side solution didn’t work, I guess configuring swapped lanes on the display driver IC via a swapped lane configuration is pretty much impossible, the only thing I don’t understand is then why are the registers that allow you to set those even there? I guess I’ll have to get in touch with the display IC and LCM vendor about this. For now we’ll stick with the DB410C, the GPU performance we seek to achieve isn’t really there but it’s not all that bad. We can always swap it out at a later stage.