Hikey960 pinctrl-single,pins description

Can some body explain the below syntax.

                    spi2_pmx_func: spi2_pmx_func {
                            pinctrl-single,pins = <
                                    0x08c MUX_M1 /* SPI2_CLK */
                                    0x090 MUX_M1 /* SPI2_DI */
                                    0x094 MUX_M1 /* SPI2_DO */
                                    0x098 MUX_M1 /* SPI2_CS0_N */

I have taken this config from hikey960-pinctrl.dtsi file.

I would like to understand what is 0x08C means and about MUX_M1.
From where did we get this offset data(0x08C,0x090 etc…)

@ric96 and @Loic can you please help on this topic.

Modern SoCs have what we call pinmux function, which allow to programmatically route external pins of the SoC to different internal IPs, depending how you want to use the pin, either as a standard GPIO, as the I2C0 clock line, etc…

The component responsible for the routing is the pin-controller (one or more), which like any other device is described in the device tree as a device node. Some sub-nodes can be added to defines pinmux configurations, usually containing configuration for a group of pins achieving the same function (e.g. I2C clock pin + I2C data pin). If a pinmux configuration node (pmx) is selected by a device (e.g.the I2C controller), then it will be applied by the OS. There is also pinconf (cfg) controller which are used to configure the pin e.g. pull-up down, drive strength, etc…

In your case, the spi_pmx_func pinmux configuration is selected by the spi2 controller (spi@ffd68000) in hi3660.dtsi, and contains the routing for spi2 clock, data in/out and clock.

If you look at pinctrl-single, pins documentation [1], you will see that the pmx configuration nodes for pinctrl-single are specified as pinctrl register offset and value pairs. So In your case 0x08C is the register offset (inside pin controller pmx4: pinmux@fff11000) and MUX_M1 is the value to write inside this register. The offset and mux value for pins are should be normally described in the datasheet, but it does not seem to be available publicly.

However, the hi3660 is composed of several GPIO modules (including pin controller), each of them corresponds to a group of eight GPIO interfaces (cf 8.5 GPIO of the reference manual). It seems that pin controller for the always-on area (AO) controls modules 22 to 28, so GPIO_176 (228) to GPIO_231 (288+7).

Now, If you look at the hikey960 schematics, you will see that SPI2_CLK corresponds to pin GPIO_215 which is index 39 of the AO (215 - 176). The register for each pinmux config is 32-bit (4-octet), so the register offset is 156 (39 * 4), or 0x9c, that matches pinconf spi2_cfg_func, but not exactly pinmux (pmx) which indicates a 0x8c offset, not sure what it means, maybe a shift…

[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt

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Hi @Loic Thanks a lot for your nice explanation.