Enable SPI on core board

Products Support TB-96AIoT
#1

SPI appears to not be enabled on the prebuilt 2019 image. Any way to enable it without going via buildroot? If a new build is the only way then some guidance there would be appreciated, but I’d prefer not to have to go that way.

My reasons for thinking it is disabled are
No spidev under /dev
No devices under /sys/bus/spi/devices

#2

Looks like SPI is enabled but the files /dev/spidev* are not in the device table. I have no idea how to work without them, or if that’s even possible, and having trouble finding a comprehensive explanation of how to add them to the device table. Any links or refs would be great.

#3

You can modify the dts code to enable spi1 interface. And then try again.

#4

Thanks, I am working on that but having trouble finding information on how exactly that is done. I’m continuing to work on it. Can you suggest any resources?

While you’re here I want to ask if you can provide any more information on the fact that the 2020 image simply does not work, and neither does the buildroot guide here: Build Buildroot Linux Source for TB-96AIoT - 96Boards

Both result in a non-booting board with this output over UART:

DDR Version V1.04 20191121
LPDDR3
933MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=32 Size=1024MB
out
Boot1 Release Time: Dec  9 2019 18:18:13, version: 1.05
chip_id:524b186,0
ChipType = 0x15, 10271
sfc nor id: ff ff ff
sfc_nand id: ff ff ff
NeedKHz=200KHz,clock=12000KHz
NeedKHz=200KHz,clock=12000KHz
NeedKHz=200KHz,clock=12000KHz
NeedKHz=18000KHz,clock=192000KHz
NeedKHz=48000KHz,clock=192000KHz
mmc2:cmd19,100
SdmmcInit=2 0
BootCapSize=2000
UserCapSize=7456MB
FwPartOffset=2000 , 2000
SdmmcInit=0 NOT PRESENT
StorageInit ok = 20600
SecureMode = 0
Secure read PBA: 0x4
Secure read PBA: 0x404
Secure read PBA: 0x804
Secure read PBA: 0xc04
Secure read PBA: 0x1004
1806 loader need rk sign!
SecureInit ret = -1, SecureMode = 0

I have followed the buildroot guide exactly and everything works, after adding the ./build.sh step you mentioned in another thread, but the resulting image just doesn’t boot. I want to supply more information but I don’t think I can because like I say, it all goes smoothly up until failed boot with the message above. Can you please investigate and update the document?

I have tried different buildroot guides with varying levels of success, such as this based on a different board and buildroot repo:

http://wiki.t-firefly.com/en/Core-1808-JD4/linux_compile_buildroot.html

As long as the buildroot guide is broken, editing dts files won’t do any good.

#5

Please disregard my previous message. It turned out the supplier had sent the wrong board (an 1806).

Can you expand on how the dts code can be modified? I’m finding it extremely difficult to find any resources or assistance. I’m surprised SPI isn’t just enabled by default.

#6

In particular, which dts file needs to be edited to enable SPI on this board? Can one of the existing dts files be used as a template?

#7

I have SPI enabled, I think, by adding this to the rk1808-evb-v10.dts file:

&spi0 {
        status = "okay";
        max-freq = <100000>;
        spidev@00 {
                spi-max-frequency = <100000>;
        };
};

I can see that the device is enabled by

cat /sys/firmware/devicetree/base/spi@ffxxxxxx/status

which returns “okay”, but I’m still not seeing any spidev entries in /dev/. Is there some binding step that I’m missing?

#8

spidev0.0 now appears but it fails a test:

spidev_test -D /dev/spidev0.0

Specifically, it hangs completely and never gives any output. Can’t even close it with a kill -9, have to reboot the board. I think the part I’m probably missing is loading/registering the driver? No idea what files are being referred to there.

#9

Enabling dma via

dma-names = "tx", "rx";

Leads to difference but not better results.

SPI transfer timed out

Any suggestions? Why can’t you just provide an image with SPI is enabled? I’m beginning to think it doesn’t work at all and that’s the reason it’s not on by default. As far as I can tell EVERYTHING else is enabled by default.

#10

Hello…in my case we have brought the pins specifically from the center without any pullup/pulldown resistors anyplace. " I am a small confounded here… you would like to do a legitimate pinmux settings from part space (not client spce) with pulls empowered, in case you need your spi to work appropriately.