Enable performance monitoring unit on HiKey 960


#1

It looks like the device tree file for this board is missing the PMU entry that would allow access the the performance monitoring counters? Does the board require additional kernel patches or can you provide the details needed (interrupts property) for me to modify the device tree my self?


Odroid XU4(Cortex A15) vs HiKey 960(A73) speed
#2

Could you try below dt binding:

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index d54e7289ec94..e138eb75bfc1 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -286,6 +286,18 @@
 		clock-frequency = <1920000>;
 	};
 
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		status = "okay";
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+	};
 
 	/* display start */
 	framebuffer@E8600000 {
-- 
2.7.4

#3

Thanks @leo-yan - I have given that a try and on the face of things it works as expected, except that the output I am getting for counters appears to be junk.

After further investigation it looks like interaction between ARM PMU and CONFIG_CPU_PM that is to blame - there is a patch to the ARM PMU perf driver in 4.6 that handles CPU_PM notifications which can easily be cherry-picked onto the HiKey 4.4 android kernel branch. Once applied everything appears to work as expected and the values I get back are sensible.

The commit I cherry picked from 4.6 is “drivers/perf: arm_pmu: implement CPU_PM notifier” (da4e4f18afe0f3729d68f3785c5802f786d36e34). This applies cleanly onto the current head of android-hikey-linaro-4.4 (9ac35df5aa3b4eb053570e6cb3bedc46631a3df4).


#4

BTW @leo-yan I have modified the DT entry to give interrupt-affinity property as follows:

pmu {
	compatible = "arm,armv8-pmuv3";
	status = "okay";
	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
		     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-affinity = <&cpu0>,
			     <&cpu1>,
			     <&cpu2>,
			     <&cpu3>,
			     <&cpu4>,
			     <&cpu5>,
			     <&cpu6>,
			     <&cpu7>;
}; 

Does that look sensible to you?


#5

@bengaineyarm Thanks a lot for sharing back the missed patch and refined dt binding. I reviewed your change in DT binding looks good for me.

I will share your info with Hisilicon landing team so we can merge these patches into AOSP kernel.

BTW, though now SoC manual has no abundant info, but it has the interrupt number in the chapter “2.4.3 Interrupt Mapping” :slight_smile: https://github.com/96boards/documentation/raw/master/ConsumerEdition/HiKey960/HardwareDocs/HiKey960_SoC_Reference_Manual.pdf


#6

@leo-yan - thats great. Did not know the ref manual was available. With respect to the patch from 4.6, it looks like additionally you may also want to take https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cbcc72e037b8a3eb1fad3c1ae22021df21c97a51 on top of it, although i am not aware if the linked issue actually manifests on this board - i did not experience it whilst testing with just the first patch.


#7

@bengaineyarm Thanks for nice reminding. I committed patches onto AOSP kernel 4.4: https://android-review.googlesource.com/#/c/423639/ and credited your suggestion in the patch :slight_smile:


#8

@leo-yan Thats great news thanks!