Device tree for I2S0 on Hikey 960


#21

Why does an accessory have to be in mezzanine configuration to be valid? In fact, I find that having accessories in mezzanine configuration to be quite limiting, since it generally means that you get that one accessory and then its game over. So for this reason, I find the Seeed sensors mezzanine to be particularly useful, since it is basically just a breakout of all the I/O’s on the LS. Well, all except for the i2s, which is a little frustrating.


#22

Get yourself a LOGIC ANALYZER. I used one to help get the bluetooth i2s working. You don’t need a super expensive scope – this is something that anyone can do.

Just be aware that the I/O on the baseboard is 1.8V, and inexpensive logic analyzers are generally 3.3V minimum, so you’ll also need a logic level converter like this; https://www.adafruit.com/product/395
or this; https://www.adafruit.com/product/1875


#23

Well, what is the point for me to do kernel debugging for a hardware component that i don’t own and that does not even exist ?
It’s not that i work for Linaro and being paid for that :thinking:


#24

True, but that doesn’t mean it remains a pure intellectual exercise. It just does for you specifically. Also given the way this thread has unfolded, there may be an assumption on the part of @u0084500 that you might actually be getting paid for this. Some of what they’ve said has implied this.


#25

Hi:
@Helg @doitright
From the user manual, hikey960 includes I2S.
Audio
The Hikey960 Development Board has three audio ports: BT, HDMI and I2S.
And there’s also i2s pins out on LS expansion header.

Helg said:
what is the point for me to do kernel debugging for a hardware component that i don’t own and that does not even exist ?

Why do you say the hardware component is not existed???
As I know, if there’s a pin out, it’s possible to use it. If those pins only can be used as GPIOs, why does the naming is I2S???

For me, I just want to route the I2S stream out from the I2S pins. But from the discussion, I cannot do more. there’s no more details for hi3660 SOC manual. I cannot make sure whether it’s clock problem or dtsi dma config problem.


#26

I am not after the money, and will try to help any effort in the public interest (=published under GPL).
Which kernel tree are you using for development ? (note that i don’t use android).


#27

Hi, Helg:

I follow the below link to download kernel source for hikey960.
https://source.android.com/setup/devices
[Building the kernel] section
git clone https://android.googlesource.com/kernel/hikey-linaro
cd hikey-linaro
git checkout -b android-hikey-linaro-4.9 origin/android-hikey-linaro-4.9
make ARCH=arm64 hikey960_defconfig
make ARCH=arm64 CROSS_COMPILE=aarch64-linux-android- -j24

The current branch android-hikey-linaro-4.9, kernel version is 4.9.80


#28

I think you should do a simple experiment: leave the device naming in DTS and device driver as it is, and only change the base address (in reg) and pinctrl pmx/xfg from i2s2 to i2s0 for DTS.
Then change only the “bits” in the device driver. Recompile the kernel and DTB and check if you have output I2S0 datastream.


#29

Hi, Helg:

I change the dts as the below
i2s2: hisi_i2s {
compatible = “hisilicon,hisi-i2s”;
reg = <0x0 0xe804f000 0x0 0x400>,
<0x0 0xe804e000 0x0 0x400>;
pinctrl-names = “default”;
pinctrl-0 = <&i2s0_pmx_func &i2s0_cfg_func>;
dmas = <&asp_dmac 18 &asp_dmac 19>;
dma-names = “rx”, “tx”;
#sound-dai-cells = <0>;
};

kernel panic at kernel/drivers/hisi/hifi_dsp/hifi_lpp.c

static int hifi_misc_open(struct inode *finode, struct file *fd)
{
logi(“open device.\n”);
load_hifi_img_by_misc(); <— hang by this line, even though I mark this line, still kernel panic
return OK;
}

show below message

[ 9.252825] hifi_misc [I][454873]:hifi_misc_open:910: open device.
[ 9.259114] hifi_misc [E][455079]:load_hifi_img_by_misc:1167: load hifi image now
[ 9.267299] hifi_misc [I][455347]:load_hifi_img_by_misc:1178: sections_num:24, image_size:12520
[ 9.276136] hifi_misc [I][455637]:load_hifi_img_by_misc:1184: sections_num:24, i:0
[ 9.283960] hifi_misc [I][455893]:load_hifi_img_by_misc:1185: des_addr:0xe8058000, load_attib:1, size:84, sn:0, src_offset:1a0, type:1
[ 9.296258] hifi_misc [I][456296]:load_hifi_img_by_misc:1184: sections_num:24, i:1
[ 9.303942] hifi_misc [I][456548]:load_hifi_img_by_misc:1185: des_addr:0xe8080000, load_attib:1, size:4, sn:1, src_offset:1f4, type:0
[ 9.316144] hifi_misc [I][456947]:load_hifi_img_by_misc:1184: sections_num:24, i:2
[ 9.323821] hifi_misc [I][457199]:load_hifi_img_by_misc:1185: des_addr:0xe8080300, load_attib:1, size:64, sn:2, src_offset:1f8, type:0
[ 9.336093] hifi_misc [I][457601]:load_hifi_img_by_misc:1184: sections_num:24, i:3
[ 9.343773] hifi_misc [I][457853]:load_hifi_img_by_misc:1185: des_addr:0xe8080400, load_attib:1, size:364, sn:3, src_offset:238, type:0
[ 9.356139] hifi_misc [I][458258]:load_hifi_img_by_misc:1184: sections_num:24, i:4
[ 9.363820] hifi_misc [I][458509]:load_hifi_img_by_misc:1185: des_addr:0xe8080578, load_attib:1, size:0, sn:4, src_offset:3a4, type:0
[ 9.375997] hifi_misc [I][458908]:load_hifi_img_by_misc:1184: sections_num:24, i:5
[ 9.383671] hifi_misc [I][459160]:load_hifi_img_by_misc:1185: des_addr:0xe8080580, load_attib:1, size:8, sn:5, src_offset:3a4, type:0
[ 9.395839] hifi_misc [I][459559]:load_hifi_img_by_misc:1184: sections_num:24, i:6
[ 9.403506] hifi_misc [I][459810]:load_hifi_img_by_misc:1185: des_addr:0xe80805b8, load_attib:1, size:0, sn:6, src_offset:3ac, type:0
[ 9.415671] hifi_misc [I][460208]:load_hifi_img_by_misc:1184: sections_num:24, i:7
[ 9.423338] hifi_misc [I][460460]:load_hifi_img_by_misc:1185: des_addr:0xe80805c0, load_attib:1, size:8, sn:7, src_offset:3ac, type:0
[ 9.435509] hifi_misc [I][460858]:load_hifi_img_by_misc:1184: sections_num:24, i:8
[ 9.443178] hifi_misc [I][461110]:load_hifi_img_by_misc:1185: des_addr:0xe8080638, load_attib:1, size:0, sn:8, src_offset:3b4, type:0
[ 9.455350] hifi_misc [I][461508]:load_hifi_img_by_misc:1184: sections_num:24, i:9
[ 9.463020] hifi_misc [I][461760]:load_hifi_img_by_misc:1185: des_addr:0xe8080640, load_attib:1, size:12, sn:9, src_offset:3b4, type:0
[ 9.475286] hifi_misc [I][462162]:load_hifi_img_by_misc:1184: sections_num:24, i:10
[ 9.483044] hifi_misc [I][462416]:load_hifi_img_by_misc:1185: des_addr:0xe8080678, load_attib:1, size:8, sn:10, src_offset:3c0, type:0
[ 9.495309] hifi_misc [I][462818]:load_hifi_img_by_misc:1184: sections_num:24, i:11
[ 9.503066] hifi_misc [I][463072]:load_hifi_img_by_misc:1185: des_addr:0xe80806c0, load_attib:1, size:28, sn:11, src_offset:3c8, type:0
[ 9.515409] hifi_misc [I][463476]:load_hifi_img_by_misc:1184: sections_num:24, i:12
[ 9.523167] hifi_misc [I][463730]:load_hifi_img_by_misc:1185: des_addr:0xe80806f8, load_attib:1, size:0, sn:12, src_offset:3e4, type:0
[ 9.535427] hifi_misc [I][464132]:load_hifi_img_by_misc:1184: sections_num:24, i:13
[ 9.543184] hifi_misc [I][464386]:load_hifi_img_by_misc:1185: des_addr:0xe8080700, load_attib:1, size:8, sn:13, src_offset:3e4, type:0
[ 9.555440] hifi_misc [I][464788]:load_hifi_img_by_misc:1184: sections_num:24, i:14
[ 9.563198] hifi_misc [I][465042]:load_hifi_img_by_misc:1185: des_addr:0xe8080738, load_attib:1, size:0, sn:14, src_offset:3ec, type:0
[ 9.575467] hifi_misc [I][465444]:load_hifi_img_by_misc:1184: sections_num:24, i:15
[ 9.583223] hifi_misc [I][465698]:load_hifi_img_by_misc:1185: des_addr:0xe8080740, load_attib:1, size:8, sn:15, src_offset:3ec, type:0
[ 9.595517] hifi_misc [I][466101]:load_hifi_img_by_misc:1184: sections_num:24, i:16
[ 9.603296] hifi_misc [I][466356]:load_hifi_img_by_misc:1185: des_addr:0xe8080778, load_attib:1, size:0, sn:16, src_offset:3f4, type:0
[ 9.615606] hifi_misc [I][466759]:load_hifi_img_by_misc:1184: sections_num:24, i:17
[ 9.623373] hifi_misc [I][467014]:load_hifi_img_by_misc:1185: des_addr:0xe80807c0, load_attib:1, size:8, sn:17, src_offset:3f4, type:0
[ 9.635642] hifi_misc [I][467416]:load_hifi_img_by_misc:1184: sections_num:24, i:18
[ 9.640308] android_work: sent uevent USB_STATE=CONNECTED
[ 9.644474] android_work: sent uevent USB_STATE=DISCONNECTED
[ 9.654594] hifi_misc [I][468037]:load_hifi_img_by_misc:1185: des_addr:0xe8080800, load_attib:1, size:580, sn:18, src_offset:3fc, type:0
[ 9.667027] hifi_misc [I][468444]:load_hifi_img_by_misc:1184: sections_num:24, i:19
[ 9.674785] hifi_misc [I][468698]:load_hifi_img_by_misc:1185: des_addr:0xe8080a44, load_attib:1, size:1536, sn:19, src_offset:640, type:0
[ 9.687327] hifi_misc [I][469109]:load_hifi_img_by_misc:1184: sections_num:24, i:20
[ 9.695083] hifi_misc [I][469363]:load_hifi_img_by_misc:1185: des_addr:0xc0000000, load_attib:0, size:2772, sn:20, src_offset:c40, type:0
[ 9.707659] hifi_misc [I][469775]:load_hifi_img_by_misc:1184: sections_num:24, i:21
[ 9.715416] hifi_misc [I][470029]:load_hifi_img_by_misc:1185: des_addr:0xc0000ad8, load_attib:0, size:5512, sn:21, src_offset:1714, type:0
[ 9.728031] hifi_misc [I][470443]:load_hifi_img_by_misc:1184: sections_num:24, i:22
[ 9.732336] android_work: sent uevent USB_STATE=CONNECTED
[ 9.736072] configfs-gadget gadget: high-speed config #1: b
[ 9.736215] android_work: sent uevent USB_STATE=CONFIGURED
[ 9.752432] hifi_misc [I][471242]:load_hifi_img_by_misc:1185: des_addr:0xc0002060, load_attib:0, size:1100, sn:22, src_offset:2c9c, type:1
[ 9.765090] hifi_misc [I][471657]:load_hifi_img_by_misc:1184: sections_num:24, i:23
[ 9.772846] hifi_misc [I][471911]:load_hifi_img_by_misc:1185: des_addr:0xc00024b0, load_attib:0, size:1827432, sn:23, src_offset:30e8, type:2
[ 9.786379] Bad mode in Error handler detected on CPU5, code 0xbf000002 – SError
[ 9.793960] Internal error: Oops - bad mode: 0 [#1] PREEMPT SMP
[ 9.799958] CPU: 5 PID: 2093 Comm: servicemanager Tainted: G S 4.9.80-04600-gd8826a4-dirty #13
[ 9.809820] Hardware name: HiKey960 (DT)
[ 9.813788] task: ffffffc0b5cf4100 task.stack: ffffffc0b3414000
[ 9.819772] PC is at 0x74c65efa60
[ 9.823117] LR is at 0x74c65a9a34
[ 9.826464] pc : [<00000074c65efa60>] lr : [<00000074c65a9a34>] pstate: a0000000
[ 9.833943] sp : 0000007fdc6b2230
[ 9.837289] x29: 0000007fdc6b2320 x28: 0000000000000000
[ 9.842663] x27: 0000000000000000 x26: 0000000000000000
[ 9.848034] x25: 0000000000000000 x24: 0000007fdc6b23a8
[ 9.853405] x23: 00000074c696a5d8 x22: 0000000000000001
[ 9.858777] x21: 00000000c0306201 x20: 00000074c5e2d000
[ 9.864149] x19: 00000074c696a5d8 x18: 0000007fdc6b04fa
[ 9.869522] x17: 00000074c65a99a8 x16: 0000005951368fe0
[ 9.874894] x15: 0000007fdc6b0a78 x14: 0000007fdc6b0a88
[ 9.880266] x13: 0000007fdc6b1dec x12: 0000007fdc6b21e8
[ 9.885638] x11: 0000007fdc6b2330 x10: 0000007fdc6b22e8
[ 9.891009] x9 : 0000007fdc6b22e8 x8 : 000000000000001d
[ 9.896381] x7 : 0000007500700067 x6 : 0000007500700067
[ 9.901752] x5 : 0000000000000000 x4 : 000000595134a290
[ 9.907123] x3 : 0000000000007206 x2 : 0000007fdc6b2340
[ 9.912494] x1 : 00000000c0306201 x0 : 0000000000000000
[ 9.917865]
[ 9.919367] Process servicemanager (pid: 2093, stack limit = 0xffffffc0b3414020)
[ 9.926893] —[ end trace 18f5d760976a7c68 ]—
[ 9.935391] Kernel panic - not syncing: Fatal exception
[ 9.940684] SMP: stopping secondary CPUs
[ 9.944854] Kernel Offset: disabled
[ 9.948378] Memory Limit: none
[ 9.955240] Rebooting in 5 seconds…

I’m wondering why. Is it possible the hifi.img cause i2s0 malfunctioned???
Can you help to trace what happened in hifi.img???
Maybe it only turn on i2s2, for i2s0, it’s not.


#30

Yes, i will think about it.
Did you also change the clock bits we have discussed before ?


#31

My understanding was/is that the hifi DSP is part of external Hi64xx codec, but we are only trying to generate the raw I2S datastream on the I2S0 CPU pins.


#32

You must disable all of the hifi stuff. The odd thing is that there is no reference to hifi in the i2s2 driver at all, so I wonder if you might be trying to use some resource that is already in use by the hifi dsp?


#33

Copy response I received from HiSilicon here:

There is no direct relation between hifi and i2s driver Just rewrite i2s2’s reg addr will never cause this panic when loading hifi img。
Pls revert all changes, Just follow these:

1.modify reg addr in dts:
0xe804f800 change to 0xe804f000
1.modify reg addr in dts:
0xe804f800 change to 0xe804f000
2.add pin-ctl :
i2s0_cfg_func: i2s0_cfg_func {
pinctrl-single,pins = <
0x06c 0x0 /* I2S0_DI /
0x070 0x0 /
I2S0_DO /
0x074 0x0 /
I2S0_XCLK /
0x078 0x0 /
I2S0_XFS */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_UP
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_02MA DRIVE6_MASK
>;
};

  i2s0_pmx_func: i2s0_pmx_func {
         pinctrl-single,pins = <
                  0x040 MUX_M1 /* I2S0_DI */
                  0x044 MUX_M1 /* I2S0_DO */
                  0x048 MUX_M1 /* I2S0_XCLK */
                  0x04c MUX_M1 /* I2S0_XFS */
        >;
  };
  1. Modify hisi-i2s.c
    in function hisi_i2s_startup:
    hisi_syscon_bits(i2s, HI_ASP_CFG_R_RST_CTRLDIS_REG, 0,BIT(2)|BIT(6)|BIT(8)|BIT(16));
    change to:
    hisi_syscon_bits(i2s, HI_ASP_CFG_R_RST_CTRLDIS_REG, 0,BIT(0)|BIT(6)|BIT(8)|BIT(16));

hisi_syscon_bits(i2s, HI_ASP_CFG_R_GATE_EN_REG, 0,BIT(5)|BIT(6));
change to :
hisi_syscon_bits(i2s, HI_ASP_CFG_R_GATE_EN_REG, 0,BIT(2)|BIT(1));

hisi_syscon_bits(i2s, HI_ASP_CFG_R_GATE_CLKDIV_EN_REG, 0,BIT(2)|BIT(5));
change to:
hisi_syscon_bits(i2s, HI_ASP_CFG_R_GATE_CLKDIV_EN_REG, 0,BIT(2)|BIT(3));

hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK1_DIV_REG, HI_ASP_MASK,HI_ASP_CFG_R_CLK1_DIV_SEL);
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK4_DIV_REG, HI_ASP_MASK,HI_ASP_CFG_R_CLK4_DIV_SEL);
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK6_DIV_REG, HI_ASP_MASK,HI_ASP_CFG_R_CLK6_DIV_SEL);
change to:
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK1_DIV_REG, HI_ASP_MASK,HI_ASP_CFG_R_CLK1_DIV_SEL);
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK3_DIV_REG, HI_ASP_MASK,HI_ASP_CFG_R_CLK4_DIV_SEL);
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK5_DIV_REG, HI_ASP_MASK,HI_ASP_CFG_R_CLK6_DIV_SEL);

in function _hisi_i2s_set_fmt:
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK_SEL_REG, 0, HI_ASP_CFG_R_CLK_SEL_EN);
change to:
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK_SEL_REG, 0, BIT(0));

hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK_SEL_REG, HI_ASP_CFG_R_CLK_SEL_EN,0);
change to:
hisi_syscon_bits(i2s, HI_ASP_CFG_R_CLK_SEL_REG, BIT(0),0);

–END


#34

@guodong , any comment on the ASP DMA channel usage?


#35

Copy response from HiSilicon ( houxiaoyong)

" DMA is a common design, and is independent of other on-chip modules. There are no differences among all 16 DMA channels. And there is no special requirement from audio/i2s to DMA. So theoretically, you can choose any of these 16 DMA channels and apply them on I2S0."

If you find some of these channels cannot work, HiSilicon agrees that they should investigate together with community. So, right now, let’s limit our changes to minimum, and see how it goes, let’s fix i2s0 not working issue first.

–END


#36

@helg @u0084500 and all,

Here is a commit for enabling i2s0 on HiKey960. Note, due we don’t have proper hardware extension boards, we need someone else to verify on hikey960.

https://android-review.googlesource.com/c/kernel/hikey-linaro/+/665342

HiSilicon believed it should work the same way on hikey960 as on hikey970. Please let us know your result on hikey960.

Thanks.


#37

Hi, GuoDong:

OK, I'll try this patch. If any result, I'll post in the forum.

Thx.


#39

Hi GuoDong,

Thanks for the posting the changes. I tested it and I was able to get I2S0 working in HiKey 960. I was able to capture audio through external codec at 48K sample rate.

I was trying to capture audio at 16K sample rate and the audio data captured wasn’t right. I think it because the driver is set to 48K. I don’t see any registers being set for rate.

Do you have any changes to support other sample rates like 16K?

Thanks!


#40

Hi shanvasu,

Did you had make changes to the posted gerrit patch to get the interface /dev/snd/XXXX enumerated? Original patch would not enumerate them (also has been mentioned in review comments of this patch). If you have done some changes on top, can you share them on posted gerrit as review comments.

Thanks.


#41

I’ve been through the sample rate changes for i2s2. What you need to do is change the value of HI_ASP_CFG_R_CLK4_DIV_SEL from 0x00ff000f (3 MHz bit clock) to 0x00ff002f (1 MHz bit clock).