I am trying to figure out the topology for each one of the CTIs in DragonBoard 410c.
I am able to discover the input and output port connections for the four CTIs connected to each CPU through sysfs (cti_cpu0, cti_cpu1, cti_cpu2 and cti_cpu3).
However, two extra CTIs show up as cti_sys0 and cti_sys1, for which the connections to other CoreSight components are not exposed to sysfs or the device tree.
Does anyone know if these CTI connections are hardcoded to other CoreSight components?
I specifically care about sending a trigger signal from STM to the ETR.