Cache size for Hikey


#1

I am unable to find any documentation on the Kirin 620 SoC which specifies what the size of the L1 or L2 cache size is.

ARM A53 specifies the L1 cache should be 8, 16, 32, or 64 KB, and that the L2 cache is optional, but if included should be 128,256,512 KB, 1MB, or 2MB. (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500g/CJHBABIC.html)

What is the size of the L1 and L2 cache on the Lemaker Hikey?

Thank you,


#2

Does https://github.com/96boards/documentation/blob/master/ConsumerEdition/HiKey/AdditionalDocs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf page 1-4 contain what you’re looking for?


#3

Yes, thank you!