Booting all 4 cores on ultra96 with baremetal xilinx SDK

Hello, I was curious if anyone has gotten all 4 cores and the r5’s to boot and run on a ultra96 board in the xilinx SDK.

I am having trouble booting 4 cores correctly.

Currently I follow this guide: https://www.xilinx.com/html_docs/xilinx2018_1/SDK_Doc/SDK_concepts/concept_sdk_linkerscripts.html

but in boot.S in the line"

after executing b _startup

it jumps to a garbage location and dies.

my DDR is 2GB, I configure each core with a different region as such:

core0: base address: 0x0 size 0x20000000

core1: base address: 0x20000000 size 0x20000000

core2: base address: 0x40000000 size 0x20000000

core3: base address: 0x60000000 size 0x20000000

I also tried a size of 0x1FFFFFFF as (0x7FFFFFFF/4) = 0x1FFFFFFF but this also did not work.

I refreshed my workspace and did a clean build but still am having issues.

Any thought or insight is greatly appreciated thank you!!