Hi Markus,
So I managed to get my OpenOCD JTAG setup working. I can set halt the processor, set breakpoints, and write memory. Reading memory isn’t working yet.
The important bits of the OpenOCD hi6220.cfg file I created I’ve pasted in below. Hopefully this should be enough to get you going with the DS-5. I’ve never used the DS-5 myself, but I suspect all it will need to know is the DAP and cti base addresses for the different A53 cores.
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0x3 -expected-id 0x5ba00477 -enable
#JTAG tap: auto0.tap tap/device found: 0x5ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x5)
target create $_TARGETNAME aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x80190000 -ctibase 0x80198000 -coreid 0
#target create $_TARGETNAME_1 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x80192000 -ctibase 0x80199000 -coreid 1
#target create $_TARGETNAME_2 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x80194000 -ctibase 0x8019A000 -coreid 2
#target create $_TARGETNAME_3 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x80196000 -ctibase 0x8019B000 -coreid 3
#target create $_TARGETNAME_4 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x801D0000 -ctibase 0x801D8000 -coreid 4
#target create $_TARGETNAME_5 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x801D2000 -ctibase 0x801D9000 -coreid 5
#target create $_TARGETNAME_6 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x801D4000 -ctibase 0x801DA000 -coreid 6
#target create $_TARGETNAME_7 aarch64 -chain-position $_CHIPNAME.dap -dbgbase 0x801D6000 -ctibase 0x801DB000 -coreid 7
FYI the full file is here https://git.linaro.org/people/peter.griffin/openocd-code.git/blob/c9490364e01df16fe738bc0f88d12cc389e62cda:/tcl/target/hi6220.cfg
kind regards,
Peter.