410C/android on-chip UART cannot function

Products Support DragonBoard410c
#1

Hi,

i’m trying to use the on-chip BLSP1’s low speed UART where the kernel source default is the high speed. i can now see the HSL1 device under /dev directory, but tested with the CRO and found no output even if i use echo command to send out data.

The following code i modified,
apq8016-sbc.dtsi:

/ {
	aliases {
		serial0 = &blsp1_uart1;
		serial1 = &blsp1_uart2;
	};
};
...
&blsp1_uart1 {
	status = "ok";
};

&blsp1_uart2 {
	status = "ok";
	pinctrl-names = "default";
	pinctrl-0 = <&uart_console_sleep>;
};

msm8916.dtsi:

/*	blsp1_uart1: uart@78af000 {
		compatible = "qcom,msm-hsuart-v14";
		reg = <0x78af000 0x200>,
		      <0x7884000 0x23000>;
		reg-names = "core_mem", "bam_mem";
		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
		#address-cells = <0>;
		interrupt-parent = <&blsp1_uart1>;
		interrupts = <0 1 2>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0xffffffff>;
		interrupt-map = <0 &intc 0 107 0
				1 &intc 0 238 0
				2 &msm_gpio 1 0>;

		qcom,bam-tx-ep-pipe-index = <0>;
		qcom,bam-rx-ep-pipe-index = <1>;
		qcom,master-id = <86>;

		clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,
			 <&clock_gcc clk_gcc_blsp1_ahb_clk>;
		clock-names = "core_clk", "iface_clk";

		qcom,msm-bus,name = "blsp1_uart1";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
				<86 512 0 0>,
				<86 512 500 800>;
		pinctrl-names = "sleep", "default";
		pinctrl-0 = <&hsuart_sleep>;
		pinctrl-1 = <&hsuart_active>;
		status = "disabled";
//	};
//	
//	blsp1_uart2: serial@78b0000 {
	};*/

	blsp1_uart1: serial@78b0000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0x78b0000 0x200>;
		interrupts = <0 108 0>;
		status = "disabled";
		clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
			 <&clock_gcc clk_gcc_blsp1_ahb_clk>;
		clock-names = "core_clk", "iface_clk";
	};

	blsp1_uart2: uart@78af000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0x78af000 0x200>;
		interrupts = <0 107 0>;
		status = "disabled";
		clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,
			<&clock_gcc clk_gcc_blsp1_ahb_clk>;
		clock-names = "core_clk", "iface_clk";
	};

msm8916-pinctrl.dtsi:

		pmx-uartconsole {
			qcom,pins = <&gp 4>, <&gp 5>;
			qcom,num-grp-pins = <2>;
			qcom,pin-func = <2>;
			label = "uart-console";

		uart_console_sleep: uart-console {
				drive-strength = <2>;
				bias-pull-down;
			};
		};

		blsp1_uart2 {
			qcom,pins = <&gp 0>, <&gp 1>;
			qcom,num-grp-pins = <2>;
			qcom,pin-func = <2>;
			label = "uart-blsp-2";

			uart_blsp2_sleep: uart-blsp-2 {
				drive-strength = <2>;
				bias-pull-down;
			};
		};

/*		blsp1_uart1_active {
			qcom,pins = <&gp 0>, <&gp 1>, <&gp 2>, <&gp 3>;
			qcom,num-grp-pins = <4>;
			qcom,pin-func = <2>;
		        label = "blsp1_uart1_active";

			hsuart_active: default {
				drive-strength = <16>;
				bias-disable;
			};
		};
*/
		blsp1_uart1_sleep {
			qcom,pins = <&gp 0>, <&gp 1>, <&gp 2>, <&gp 3>;
			qcom,num-grp-pins = <4>;
			qcom,pin-func = <0>;
		        label = "blsp1_uart1_sleep";

			hsuart_sleep: sleep {
				drive-strength = <2>;
				bias-disable;
			};
		};
#2

Can you check the permissions on /dev/ttyHSL1? I think you will find it is owned by root, and only has root access permissions. You can’t echo to it from a non-root shell. Last time I had this problem I had to add
chmod 777 /dev/ttyHSL2
to the end of /etc/init.qcom.post_boot.sh to maintain access. even if you change the permissions on the file, it will revert to the root only access every time you reboot.

#3

@ljking How did you modify /etc/init.qcom.post_boot.sh? I got a failed to copy 'init.qcom.post_boot.sh' to '/etc/init.qcom.post_boot.sh': Read-only file system error when trying to do that.

#4

adb root; adb remount did the trick.