Qualcomm Snapdragon APQ8016 fanout

Can anybody suggest me how to fanout Qualcomm Snapdragon APQ8016.
I have been working for 2 months but unable to find any solution which could work for me.
This processor has irregular pad placement.
If anyone can suggest or give advice will be appreciated.

Is it related to: Regarding the Dragonboard410c

Maybe @ljking knows about such hardware details.

Hi Pooja

Wow, into the way-back machine. It has been a few years since I left Qualcomm and I have forgotten a lot about the 410. But having said that, a good place to start is here: https://developer.qualcomm.com/hardware/apq-8016e/tools

I wrote the Processor Design Guidelines document while I was there (with a lot of help from a lot of Qualcomm employees), and it shows many of the tricks to a successful breakout of the 410 chip. The irregular pad placement is intentional to allow you to do the breakout. Without the missing and staggered/moved balls it can’t be done.

Depending on your level of skill at high performance layouts I suspect you need at least 10 layers in a 2-n-2 config. I do know that some of the cell phone manufacturers managed to do the layout in 8-layers 1-n-1 configuration, but that is really tough, and you have to leave a lot of optional I/O disconnected. if your production volume is low (less than 100,000 units per year) I would suggest you go with a 10-layer, full-stack micro-via design. I could be wrong, but I seem to remember the Dragon board was 12-layers in 2-n-2 stackup.

The Design document says this, but I can’t stress enough the Power Distribution Network is critical! If you don’t get this right, you will experience processor crashes for no obvious reason.

I am no longer an employee of Qualcomm, so of course this is not official advice from Qualcomm.

Best of luck in getting your board layout done.


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Hello Sir,
Thank you so much for the response, really appreciated. Can we remove the pads which are not in use will it affect on circuit? Can it be fanout easily?
I’d placed via in pad for the breakout. Will it cause any issue to the circuit?
I’m designing it with 8 layers 2-n-2 and via diameter 0.25 within BGA.

You need to keep the pad under every ball otherwise your assembly house won’t be able to get good yield when soldering the chip to the board.

As far as via diameter and via in pad, this is really dependant on your PCB manufacturer, and your assembly house. You should be talking to them about what they can reliably build. Electrically the signals don’t care if the via is in the pad or beside the pad, it all comes down to what your suppliers can build.