Yes I’ve tried this in my previous post, results were not quite right.
If I recall correctly, the result was that the pixel clock was getting set to 42002400, which as far as I can tell is incompatible with the camera or camss and causes the following errors 42002400 Hz = 42 MHz, 42 MHz should be a compatible pixel clock for this camera:
[ 2074.395584] qcom-camss 1b0ac00.camss: VFE0 pix0 overflow [ 2074.488818] qcom-camss 1b0ac00.camss: VFE sof timeout [ 2075.000809] qcom-camss 1b0ac00.camss: VFE reg update timeout [ 2076.001879] qcom-camss 1b0ac00.camss: vfe_camif_wait_for_stop: camif stop timeout
If 42 MHz is compatible why is this not working? I’m going to give your branch another look tonight.