PetaLinux 2018.2 BSP


#1

Xilinx has posted a PetaLinux 2018.2 BSP for the Ultra96 board here:
https://www.xilinx.com/member/forms/download/xef.html?filename=xilinx-ultra96-reva-v2018.2-final.bsp

Bryan


#2

I am assuming this is to be used with the Peta Linux installer?


#3

Yes, sorry this wasn’t more clear. To use this BSP you will also need to have Xilinx PetaLinux installed. Instructions for installing PetaLinux - and the Ultra96 BSP - can be found here:

–Tom


#4

Thank!
I gave this a go… and the following error popped up

[sahaj@fedora xilinx-ultra96-reva-2018.2]$ petalinux-build
[INFO] building project
[INFO] generating Kconfig for project
                                                                                
[INFO] oldconfig project
[INFO] sourcing bitbake
[INFO] generating plnxtool conf
[INFO] generating meta-plnx-generated layer
[INFO] generating bbappends for project . This may take time ! 
rsync: change_dir "/home/sahaj/Xilinx/Peta/components/yocto/source/arm/layers/core/meta/recipes-core/init-ifupdown/init-ifupdown-1.0" failed: No such file or directory (2)
rsync error: some files/attrs were not transferred (see previous errors) (code 23) at main.c(1189) [sender=3.1.3]
[INFO] generating u-boot configuration files
                                                                                                                                                               
[INFO] generating kernel configuration files
[INFO] generating kconfig for Rootfs
[INFO] oldconfig rootfs
[INFO] generating petalinux-user-image.bb
INFO: bitbake petalinux-user-image
ERROR:  OE-core's config sanity checker detected a potential misconfiguration.
    Either fix the cause of this error or at your own risk disable the checker (see sanity.conf).
    Following is the list of potential problems / advisories:

    You system needs to support the en_US.UTF-8 locale.

Summary: There was 1 ERROR message shown, returning a non-zero exit code.
ERROR: Failed to build project
[sahaj@fedora xilinx-ultra96-reva-2018.2]$ locale
LANG=en_US.UTF-8
LC_CTYPE="en_US.UTF-8"
LC_NUMERIC="en_US.UTF-8"
LC_TIME="en_US.UTF-8"
LC_COLLATE="en_US.UTF-8"
LC_MONETARY="en_US.UTF-8"
LC_MESSAGES="en_US.UTF-8"
LC_PAPER="en_US.UTF-8"
LC_NAME="en_US.UTF-8"
LC_ADDRESS="en_US.UTF-8"
LC_TELEPHONE="en_US.UTF-8"
LC_MEASUREMENT="en_US.UTF-8"
LC_IDENTIFICATION="en_US.UTF-8"
LC_ALL=
[sahaj@fedora xilinx-ultra96-reva-2018.2]$

As you can see LANG is set to en_US.UTF-8. Running on Fedora 28.
I was able to get through using this forum post https://forums.xilinx.com/t5/Embedded-Linux/Petalinux-2017-4-quot-petalinux-build-quot-fails-on-the-newest/m-p/845233#M25320


#5

UPDATE:
I was able to get it to build properly but had to switch to ubuntu environment.

A few notable things (in case someone lands on this thread):

  1. I Verified SD card boot and it looks nice, Display Port works haven’t tested USB3 but there is no reason it won’t work
  2. You don’t necessarily have to compile from source, there are prebuilts present in the bsp
  3. the above mentioned documentation doesn’t mention (on page 38) that the sdcard needs to be partitioned into two, one for boot and the other for rootfs (rootfs.ext4 is built during compilation)
  4. The hardware folder under the BSP contains a pre-configured project template that can be opened with vivado.

#6

Once the process is confirmed, it will be of much more use in the 96Boards/documentation repo under “installation” folder.

@ric96 What do you think?


#7

The PDF Doc is fairly comprehensive, we can create basic/beginner instructions under the installation/building section of the doc.
I was also thinking if we can host the prebuits at https://releases.linaro.org/96boards/ultra96/ ?


#8

Agreed. @ric96

To host pre-builts, we will need to give them over to @fabo - Thought, how different are these images provided a month or so ago here:

http://releases.linaro.org/96boards/ultra96/avnet/openembedded/latest/

Thanks,


#9

Functionally about the same but the major difference, apart from having a different Desktop environment, is that these are “official” images and have been tested by Xilinx.


#10

Hi,

As a beginner to embedded Petalinux on the Ultra96, I have been learning about how to build both the FPGA and Petalinux images for the 2018.2 BSP. It has been a fascinating process and very satisfying when the posted instructions work and Linux boots on my Ultra96 board :smile:
A big thank-you to the creators of the content - if you happen to see this post.

Now that I’ve gotten my feet wet, I would like to do more and re-program the FPGA from the Linux while it is still running. Just a full bitstream for now, nothing fancy like partial bitstreams. Is there relevant documentation with the steps to configure Petalinux 2018.2 to enable the Device Tree Overlay / FPGA Manager (not sure of the terminology) approach?
The only related link that I have found is this one on the Xilinx Wiki site, but the steps don’t seem to be for a Petalinux environment. At least I don’t see the same kernel configuration menu.
I get the impression that the Petalinux team will be releasing an update to automate the process more, but it seems like it is already very much possible.

Any tips on where I can find a step-by-step guide on re-programming the FPGA from within a running Petalinux environment would be much appreciated!

Thanks,
harnhua


#11

Take a look here: http://www.wiki.xilinx.com/Solution+Zynq+PL+Programming+With+FPGA+Manager

Bryan