PCIe legacy interrupts support

Products Support DragonBoard 845c
#1

Hello,

I am trying to use a PI7C9X440SL PCIe/USB adapter on sdm845.
This PCIe device does not support MSI interrupts.

On 5.10 kernel, the pci device is detected but EHCI driver probe fails with this message “Found HC with no IRQ. Check BIOS/PCI”.

lspci shows that legacy interrupt cannot be found:

#lspci -vv -s 0000:03:00.2 
0000:03:00.2 USB controller: Pericom Semiconductor PI7C9X442SL USB EHCI Controller (rev 01) (prog-if 20 [EHCI])
 Subsystem: Pericom Semiconductor PI7C9X442SL USB EHCI Controller
 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
 Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
 Interrupt: pin C routed to IRQ 0
 Region 0: Memory at 60302000 (32-bit, non-prefetchable) [size=256]

It is not clear to me if legacy interrupts are supported by the pcie-qcom driver.
Do I need to add the PCIe/USB device description in the device tree for this to work ?

#2

Hello,

I finally found a solution for my problem.

In the arch/arm64/boot/dts/qcom/sdm845.dtsi file, in pcie0 node, the interrupt-map property was incorrect.
Adding this patch fixed the legacy interrupts.

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index ea6e3a11e641..124d9bfaf500 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1823,10 +1823,10 @@ pcie0: pci@1c00000 {
                        interrupt-names = "msi";
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-                                       <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-                                       <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-                                       <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+                       interrupt-map = <0 0 0 1 &intc 0 0 GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+                                       <0 0 0 2 &intc 0 0 GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+                                       <0 0 0 3 &intc 0 0 GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+                                       <0 0 0 4 &intc 0 0 GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */

                        clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
                                 <&gcc GCC_PCIE_0_AUX_CLK>,

I found (too late :slight_smile: ) that a similar patch was done recently in upstream kernel :

arm64: dts: qcom: Fix 'interrupt-map' parent address cells

So this problem should be fixed on next kernel 5.16.

Another thing I had to tweak in the device tree for this specific PCI device to work is iommu-map property. As the device enumerates as 5 PCI devices, I needed to add new Requester IDs. I followed the documentation (Documentation/devicetree/bindings/pci/pci-iommu.txt), to make it work.