Mainline kernel PCIE part still missing

Hi I would like to use mainline kernel 5.4
are there any chance that we will see PCIE part integrated soon?

I know that I can cherry pick this :slight_smile:

but it will be nice to have it.
Or are there any problems?


I am building(on board)
git clone --single-branch --branch hikey970_pcie hikey970
with this defconfig

and this

but I still don’t see anything with sudo lspci -v
00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0, IRQ 255
[virtual] Memory at f6000000 (64-bit, non-prefetchable) [size=16M]
Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0
I/O behind bridge: None
Memory behind bridge: None
Prefetchable memory behind bridge: None
Capabilities: [40] Power Management version 3
Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+
Capabilities: [70] Express Root Port (Slot-), MSI 00
Capabilities: [100] Advanced Error Reporting
Capabilities: [148] Power Budgeting <?>
Capabilities: [158] Secondary PCI Express <?>
Capabilities: [170] L1 PM Substates

[ 0.428936] kirin-pcie f4000000.pcie: host bridge /soc/pcie@f4000000 ranges:
[ 0.428944] kirin-pcie f4000000.pcie: Parsing ranges property…
[ 0.428953] kirin-pcie f4000000.pcie: MEM 0xf6000000…0xf7ffffff -> 0x00000000
[ 1.434086] kirin-pcie f4000000.pcie: Link Fail
[ 1.438772] kirin-pcie f4000000.pcie: PCI host bridge to bus 0000:00

Any idea how can I fix it ?@Mani

so I added

And now I have some more

[ 1.440877] pci_bus 0000:00: root bus resource [bus 00-01]
[ 1.440882] pci_bus 0000:00: root bus resource [mem 0xf6000000-0xf7ffffff] (bus address [0x00000000-0x01ffffff])
[ 1.440886] pci_bus 0000:00: scanning bus
[ 1.440922] pci 0000:00:00.0: [19e5:3670] type 01 class 0x060400
[ 1.440973] pci 0000:00:00.0: reg 0x10: [mem 0xf6000000-0xf6ffffff 64bit]
[ 1.441116] pci 0000:00:00.0: supports D1 D2
[ 1.441119] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 1.441128] pci 0000:00:00.0: PME# disabled
[ 1.441975] pci_bus 0000:00: fixups for bus
[ 1.441982] pci 0000:00:00.0: scanning [bus 01-ff] behind bridge, pass 0
[ 1.442056] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01])
[ 1.442059] pci_bus 0000:01: scanning bus
[ 1.442658] pci_bus 0000:01: fixups for bus
[ 1.442663] pci_bus 0000:01: bus scan returning with max=01
[ 1.442671] pci 0000:00:00.0: scanning [bus 01-ff] behind bridge, pass 1
[ 1.442680] pci_bus 0000:00: bus scan returning with max=ff
[ 1.442705] pci 0000:00:00.0: BAR 0: assigned [mem 0xf6000000-0xf6ffffff 64bit]
[ 1.442724] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[ 1.442849] pcieport 0000:00:00.0: assign IRQ: got 42
[ 1.443040] pcieport 0000:00:00.0: Signaling PME with IRQ 43
[ 1.443204] aer 0000:00:00.0:pcie002: AER enabled with IRQ 43

still no device with lspci -v

btw I have working Ethernet when I use 4.9 kernel with UEFI
git clone --single-branch --branch hikey970-v4.9-Debain-Working -b hikey970-v4.9-Debain-Working

ok it started to work after I did some update

sudo python -d /dev/ttyUSB0 --img1 ./sec_usb_xloader.img --img2 ./sec_usb_xloader2.img --img3 ./l-loader.bin
$ sudo fastboot flash fastboot l-loader.bin
$ sudo fastboot flash fip fip.bin

@xlazom00 Sorry for not responding earlier. And you did the right thing. Those bootloader changes are necessary for enabling the LDO of the PCI-E switch. The commit is here:

Mainlining PCI-E changes for hikey970 requires some documentation of the register settings used. Since we don’t have any open doc for that, I don’t think there is any road ahead for mainlining.

When I do
sudo fastboot flash fastboot l-loader.bin
sudo fastboot flash fip fip.bin
from your
I can’t control GRUB with arrows only enter is working fine and arrows are switched to v and ^ characters
any idea ?
everything was fine with
files from


I haven’t experienced any issues like this. But you can try changing the keyboard layout in grub to see if it fixes.