Making some progress but still confused.
I added the following under msm_gpio in arch/arm64/boot/dts/qcom/msm8916.dtsi:
i2c1_default: i2c1_default {
pinmux {
function = "blsp_i2c1";
pins = "gpio6", "gpio7";
};
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c1_sleep: i2c1_sleep {
pinmux {
function = "blsp_i2c1";
pins = "gpio6", "gpio7";
};
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c2_default: i2c2_default {
pinmux {
function = "blsp_i2c2";
pins = "gpio22", "gpio23";
};
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c2_sleep: i2c2_sleep {
pinmux {
function = "blsp_i2c2";
pins = "gpio22", "gpio23";
};
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-disable = <0>;
};
};
and the following under soc:
blsp_i2c2: i2c@78b5000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b5000 0x1000>;
interrupts = <GIC_SPI 95 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
blsp_i2c6: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b6000 0x1000>;
interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
pinctrl-1 = <&i2c2_sleep>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
I then set the status to “ok” in arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi for both blsp_i2c1 and 2 to match the way it was done with blsp_i2c4.
After flashing the new boot image things looked and the i2c entries showed up but were not working properly and this is what I saw in dmesg:
[ 2.091315] i2c /dev entries driver
[ 2.095687] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio6" for function "blsp_i2c1"
[ 2.098563] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio7" for function "blsp_i2c1"
[ 2.106928] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio6" for function "blsp_i2c1"
[ 2.115247] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio7" for function "blsp_i2c1"
[ 2.123660] i2c_qup 78b5000.i2c:
tx channel not available
[ 2.133821] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio22" for function "blsp_i2c2"
[ 2.138842] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio23" for function "blsp_i2c2"
[ 2.147553] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio22" for function "blsp_i2c2"
[ 2.155957] msm8916-pinctrl 1000000.pinctrl: invalid group "gpio23" for function "blsp_i2c2"
[ 2.164445] i2c_qup 78b6000.i2c:
tx channel not available
[ 2.174067] i2c_qup 78b8000.i2c:
tx channel not available
Digging around the sys fs I found the following:
linaro@linaro-alip:~$ sudo grep blsp_i2c /sys/kernel/debug/pinctrl/1000000.pinctrl/pinmux-functions
function: blsp_i2c1, groups = [ gpio2 gpio3 ]
function: blsp_i2c2, groups = [ gpio6 gpio7 ]
function: blsp_i2c3, groups = [ gpio10 gpio11 ]
function: blsp_i2c4, groups = [ gpio14 gpio15 ]
function: blsp_i2c5, groups = [ gpio18 gpio19 ]
function: blsp_i2c6, groups = [ gpio22 gpio23 ]
So based on this I changed the function names (i.e. blsp_i2cX) in the pinctrls (but left the pinctrl names --ie i2cX_default/sleep-- the same) and also changed the names of the blsp_i2cX entries in the soc section. I left the core clock the same as it matched the physical address as described in the Peripherals programing guide.
After this change the dmesg error went away and things are kind of working but here is where my confusion comes from. The devices show up in sys fs:
linaro@linaro-alip:~$ ls -al /sys/bus/i2c/devices/i2c-*
lrwxrwxrwx 1 root root 0 Sep 23 23:10 /sys/bus/i2c/devices/i2c-0 -> ../../../devices/platform/soc/78b5000.i2c/i2c-0
lrwxrwxrwx 1 root root 0 Sep 23 23:10 /sys/bus/i2c/devices/i2c-1 -> ../../../devices/platform/soc/78b6000.i2c/i2c-1
lrwxrwxrwx 1 root root 0 Sep 23 23:10 /sys/bus/i2c/devices/i2c-2 -> ../../../devices/platform/soc/78b8000.i2c/i2c-2
And they appear to point to the correct physical address but in practice the pins for i2c0 as described in the schematics (ie. gpio6 and 7) are the ones responding to i2cbus 1 using i2cdetect which seems incorrect based on the above. i2cbus 0 responds extremely slow using i2cdetect.
Is the problem that I didn’t remain consistent with the naming of the pin controls? Should I switch pinctrl names and physical address to match the pinmux-functions?
thanks
