How to enable internal gpio pull up/down

Hi,

we have connected pin 32 of low speed expansion header as gpio input from external pci device. But some time spurious interrupts are being received even nothing is connected.
Is this due to some wrong pin muxing?
can you please let me know how to enable internal pull ups for this pin?

Thanks

I’m not entirely sure if there is any pull up configuration possible from userspace (gpioset --help doesn’t offer any way to configure pull ups). Given there is a custom wiring I’d be tempted to solder in an external pull up!

Okay. Is there a way to enable software pull-up/down through dts entry?
arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi

Also can you please share the Hikey960 programmers guide.

Thanks

The vendor docs are here:

GPIO is discussed right at the end of the SoC Reference Manual and it doesn’t look like internal pull up is supported by the hardware. Note that the link to the PL061 documentation isn’t correct. Try this one instead:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0183g/index.html

Thanks daneilt for the links.

Can you please share the pin mux controller guide.
From the below entry in file “arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi”, looks like we can enable pull up through pin mux controller right?
How is the offset “0x058” is derived?

csi1_pwd_n_cfg_func: csi1_pwd_n_cfg_func {
pinctrl-single,pins = <
0x058 0x0 /* CSI1_PWD_N */
>;
pinctrl-single,bias-pulldown = <
PULL_DIS
PULL_DOWN
PULL_DIS
PULL_DOWN
>;
pinctrl-single,bias-pullup = <
PULL_DIS
PULL_UP
PULL_DIS
PULL_UP
>;
pinctrl-single,drive-strength = <
DRIVE7_04MA DRIVE6_MASK
>;
};

Thanks,

Hi,

In the soc reference manual link shared by you, there is no information on the register address used in the dts file.

Ex:
pmu_pmx_func: pmu_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* PMU1_SSI /
0x00c MUX_M1 /
PMU2_SSI /
0x010 MUX_M1 /
PMU_CLKOUT /
0x100 MUX_M1 /
PMU_HKADC_SSI */
>;
};

Can you please let me know where 0x008 offset value is mentioned and when MUX_M1, MUX_M2… value is used for?

Thanks,

Hi,

I want to add pinmux entry for gpio_21 of soc which is connected LS pin 34 to configure it as input pin and enable internal pull up resistor.
But in the soc reference manual link, there is no information on the register address used in the dts file.

Ex:
pmu_pmx_func: pmu_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* PMU1_SSI /
0x00c MUX_M1 /
PMU2_SSI /
0x010 MUX_M1 /
PMU_CLKOUT /
0x100 MUX_M1 /
PMU_HKADC_SSI */
>;
};

Where 0x008 offset value is mentioned and when MUX_M1, MUX_M2… value is used for?

Thanks,

Hisilicon didn’t share the document on PINMUX. There’re two kinds of PINMUX registers. One is called as xxx_cfg_func in DTS that controls the internal pull status. And the other is called as xxx_pmx_func in DTS that controls the multiple functions of PIN.

If he wants to change the internal pull status on pmu pins, he needs to access pmu_pmx_func in DTS file.

------->------->-------pmu_pmx_func: pmu_pmx_func {
------->------->------->-------pinctrl-single,pins = <
------->------->------->------->-------0x008 MUX_M1 /* PMU1_SSI /
------->------->------->------->-------0x00c MUX_M1 /
PMU2_SSI /
------->------->------->------->-------0x010 MUX_M1 /
PMU_CLKOUT /
------->------->------->------->-------0x100 MUX_M1 /
PMU_HKADC_SSI */
------->------->------->------->;
------->------->-------};

------->------->-------pmu_cfg_func: pmu_cfg_func {
------->------->------->-------pinctrl-single,pins = <
------->------->------->------->-------0x010 0x0 /* PMU1_SSI /
------->------->------->------->-------0x014 0x0 /
PMU2_SSI /
------->------->------->------->-------0x018 0x0 /
PMU_CLKOUT /
------->------->------->------->-------0x10c 0x0 /
PMU_HKADC_SSI */
------->------->------->------->;
------->------->------->-------pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
------->------->------->-------pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
------->------->------->-------pinctrl-single,drive-strength = <DRIVE7_02MA DRIVE6_MASK>;
------->------->-------};

The definition of bias-pulldown & bias-pullup is in $LINUX/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt. Let me paste it in below.

  • pinctrl-single,bias-pullup : array of value that are used to configure the
    input bias pullup in the pinmux register.

------->-------/* input, enabled pullup bits, disabled pullup bits, mask */
------->-------pinctrl-single,bias-pullup = <0 1 0 1>;

  • pinctrl-single,bias-pulldown : array of value that are used to configure the
    input bias pulldown in the pinmux register.

------->-------/* input, enabled pulldown bits, disabled pulldown bits, mask */
------->-------pinctrl-single,bias-pulldown = <2 2 0 2>;

------->------->------->-------pinctrl-single,bias-pulldown = <PULL_DIS PULL_DOWN PULL_DIS PULL_DOWN>;
It means that PULLDOWN is disabled. <PULL_DOWN PULL_DOWN PULL_DIS PULL_DOWN> to enable pull down.
------->------->------->-------pinctrl-single,bias-pullup = <PULL_DIS PULL_UP PULL_DIS PULL_UP>;
It means that PULLUP is also disabled. <PULL_UP PULL_UP PULL_DIS PULL_UP> to enable pull up.

@ hzhuang1 but how do we map Each line settings.

For example:
what is the individual SPI2_CLK ,SPI2_DO, SPI_CS0_N andSPI_DI line bias settings with below given syntax.?

		spi2_pmx_func: spi2_pmx_func {
			pinctrl-single,pins = <
				0x08c MUX_M1 /* SPI2_CLK */
				0x090 MUX_M1 /* SPI2_DI */
				0x094 MUX_M1 /* SPI2_DO */
				0x098 MUX_M1 /* SPI2_CS0_N */
			>;
			pinctrl-single,bias-pulldown = <
				PULL_DIS
				PULL_DOWN
				PULL_DIS
				PULL_DOWN
			>;
			pinctrl-single,bias-pullup = <
				PULL_UP
				PULL_UP
				PULL_DIS
				PULL_UP
			>;
			pinctrl-single,drive-strength = <
				DRIVE7_02MA DRIVE6_MASK
			>;
		};

my understanding is as below.

			pinctrl-single,bias-pullup = <
				PULL_UP  (this is for SPI2_CLK)
				PULL_UP  (this is for SPI2_DI)
				PULL_DIS (this is for SPI2_DO)
				PULL_UP (this is for SPI2_CS0_N)
			>;

am i right?
@Loic please confirm on my understandings.

no, this is not a per-pin bias (though it’s not straightforward), all pins of the group will have the same config. This one configures the pull-up. The ‘pinctrl-single,bias-pullup’ documentation [1] says that it’s an array of values that are used to configure the input bias pullup in the pinmux register.

the first element of the array is the configured value (to write) the second is the enable pull up bits (value to write when pull-up is enabled) the third is the disable pull up bits (value to write when pull-up is disabled) and the last one is the register mask for pull-up bits. TBH I’m not sure why this is so complicated but I assume it’s for genericity…

pinctrl-single,bias-pullup = <
				PULL_UP  (pull-up enabled)
				PULL_UP  (value for pull-up enabled)
				PULL_DIS (value for pull-up disabled)
				PULL_UP (pull-up  config mask to use when writing register)
			>;

So here it simply says to configure the all the pins with PULL_UP (fist element), that PULL_UP value can be used to enable PULL_UP (2nd element), PULL_DIS value can be used for disabling pull-up and that PULL_UP value must be used as mask when writing the register.

[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt

Thanks a lot Loic for your nice explanation.