HDMI is not working with Q410 Dragon Board SBC


#1

Hi,

I am working on Q410 Android BSP. I had ordered 4 boards. Once I

Receive boards, one board was having RED PCB while other 3 boards

were having BLUE PCB.

When I checked HDMI with RED PCB board, HDMI is working properly

But when I checked HDMI with BLUE PCB board, HDMI is not

Working and I am getting PLL error. I checked 3 BLUE PCB boards

But problem is present in all 3 boards. I am flashing same android

Images in all 4 boards.

Capture of Non-working Board:

<6>[ 0.476358] mdss_dsi_ctrl_probe: DSI Ctrl name = MDSS DSI CTRL->0

<3>[ 0.476760] mdss_dsi_find_panel_of_node: invalid pan node, selecting prim panel

<6>[ 0.476786] mdss_dsi_panel_init: Panel Name = jdi 1080p video mode dsi panel

<3>[ 0.477089] mdss_dsi_parse_dcs_cmds: failed, key=qcom,mdss-dsi-panel-status-command

<6>[ 0.477116] mdss_dsi_parse_panel_features: ulps feature disabled

<6>[ 0.477126] mdss_dsi_parse_panel_features: ulps during suspend feature disabled

<6>[ 0.477134] mdss_dsi_parse_panel_features: dynamic switch feature enabled: 0

<3>[ 0.477146] mdss_dsi_parse_panel_features:1168, Disp_en gpio not specified

<6>[ 0.477160] mdss_dsi_panel_init: Continuous splash enabled

<3>[ 0.477603] dsi_panel_device_register:1823, TE gpio not specified

<3>[ 0.477869] mdss_dsi_pll_1_clk_init: can’t find vco_clk. rc=-517

<3>[ 0.477874] PLL 1 Clock’s did not register

<6>[ 0.477911] mdss_dsi_retrieve_ctrl_resources: ctrl_base=ffffff80003fe000 ctrl_size=25c phy_base=ffffff8000802500 phy_size=2b0

<3>[ 0.477925] dsi_panel_device_register: Using default BTA for ESD check

<3>[ 0.508183] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.509713] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.511240] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.512769] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.514299] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.515835] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.517366] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.518895] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.520425] dsi_pll_check_lock_status_8916: PLL failed to lock

<3>[ 0.520604] dsi_pll_enable: DSI PLL failed to lock

<3>[ 0.520611] mdss_dsi_link_clk_prepare: Failed to prepare dsi byte clk

<3>[ 0.520619] mdss_dsi_link_clk_start: failed to prepare clks. rc=-22

<3>[ 0.520625] mdss_dsi_clk_ctrl_sub: Failed to start link clocks. rc=-22

<3>[ 0.520630] Failed to start ctrl clocks. rc=-22

<6>[ 0.520853] mdss_register_panel: adding framebuffer device 1a98000.qcom,mdss_dsi

<6>[ 0.521192] mdss_hw_rev_init: MDP Rev=10060000

<6>[ 0.521915] mdss_dsi_status_init: DSI status check interval:5000

<6>[ 0.522481] mdss_register_panel: adding framebuffer device qcom,mdss_wb_panel.24

<6>[ 0.523728] mdss_fb_register: FrameBuffer[0] 1080x1920 registered successfully!

<4>[ 0.523787] mdss_mdp_overlay_init: mdss_mdp_overlay_init: unable to add event timer

<6>[ 0.524294] mdss_fb_register: FrameBuffer[1] 1280x720 registered successfully!

<4>[ 0.524344] mdss_mdp_overlay_init: mdss_mdp_overlay_init: unable to add event timer

<3>[ 0.524395] mdss_mdp_splash_parse_dt: splash mem child node is not present

Capture of working board:

<4>[ 0.473443] mdss_mdp_probe+0x230/0xcd4->msm_dss_ioremap_byname: ‘vbif_nrt_phys’ msm_dss_get_res_byname failed

<4>[ 0.473456] mdss_mdp_parse_dt_hw_settings: MDSS VBIF settings not found

<6>[ 0.473483] mdss_mdp_parse_dt_prop_len: prop qcom,mdss-pipe-cursor-off : doesn’t exist in device tree

<6>[ 0.473534] mdss_mdp_pipe_addr_setup: type:1 ftchid:1 xinid:0 num:0 ndx:0x1 prio:0

<6>[ 0.473545] mdss_mdp_pipe_addr_setup: type:2 ftchid:7 xinid:1 num:3 ndx:0x8 prio:1

<6>[ 0.473552] mdss_mdp_pipe_addr_setup: type:2 ftchid:8 xinid:5 num:4 ndx:0x10 prio:2

<6>[ 0.473565] mdss_mdp_pipe_addr_setup: type:3 ftchid:4 xinid:2 num:6 ndx:0x40 prio:3

<3>[ 0.473583] mdss_mdp_parse_dt_handler: Error from prop qcom,mdss-pipe-sw-reset-off : u32 array read

<3>[ 0.473778] mdss_mdp_parse_dt_handler: Error from prop qcom,mdss-ib-factor-overlap : u32 array read

<3>[ 0.473788] mdss_mdp_parse_dt_handler: Error from prop qcom,mdss-ib-factor-cmd : u32 array read

<6>[ 0.473805] mdss_mdp_parse_dt_prop_len: prop qcom,mdss-clk-levels : doesn’t exist in device tree

<6>[ 0.473836] mdss_mdp_parse_dt_prop_len: prop qcom,mdss-ad-off : doesn’t exist in device tree

<3>[ 0.474375] mdss_mdp_irq_clk_register: unable to get clk: lut_clk

<6>[ 0.477002] mdss_dsi_ctrl_probe: DSI Ctrl name = MDSS DSI CTRL->0

<3>[ 0.477379] mdss_dsi_find_panel_of_node: invalid pan node, selecting prim panel

<6>[ 0.477406] mdss_dsi_panel_init: Panel Name = dsi_adv7533_1080p

<3>[ 0.477656] mdss_dsi_parse_dcs_cmds: failed, key=qcom,mdss-dsi-panel-status-command

<6>[ 0.477683] mdss_dsi_parse_panel_features: ulps feature disabled

<6>[ 0.477693] mdss_dsi_parse_panel_features: ulps during suspend feature disabled

<6>[ 0.477700] mdss_dsi_parse_panel_features: dynamic switch feature enabled: 0

<3>[ 0.477712] mdss_dsi_parse_panel_features:1168, Disp_en gpio not specified

<6>[ 0.477726] mdss_dsi_panel_init: Continuous splash disabled

<3>[ 0.478171] dsi_panel_device_register:1815, Disp_en gpio not specified

<3>[ 0.478179] dsi_panel_device_register:1823, TE gpio not specified

<6>[ 0.478185] dsi_panel_device_register: bklt_en gpio not specified

<3>[ 0.478461] mdss_dsi_pll_1_clk_init: can’t find vco_clk. rc=-517

<3>[ 0.478466] PLL 1 Clock’s did not register

<6>[ 0.478508] mdss_dsi_retrieve_ctrl_resources: ctrl_base=ffffff8000802000 ctrl_size=25c phy_base=ffffff800081c500 phy_size=2b0

<3>[ 0.478521] dsi_panel_device_register: Using default BTA for ESD check

<6>[ 0.479412] mdss_register_panel: adding framebuffer device 1a98000.qcom,mdss_dsi

<6>[ 0.480082] mdss_dsi_status_init: DSI status check interval:5000

<3>[ 0.481295] i2c-msm-v2 78b8000.i2c: msm_bus_scale_register_client(mstr-id:86):0x3 (ok)

<6>[ 0.592799] mdss_register_panel: adding framebuffer device qcom,mdss_wb_panel.24

<6>[ 0.594138] mdss_fb_register: FrameBuffer[0] 1920x1080 registered successfully!

<4>[ 0.594201] mdss_mdp_overlay_init: mdss_mdp_overlay_init: unable to add event timer

<6>[ 0.598741] mdss_fb_register: FrameBuffer[1] 1280x720 registered successfully!

<4>[ 0.598795] mdss_mdp_overlay_init: mdss_mdp_overlay_init: unable to add event timer

<3>[ 0.598852] mdss_mdp_splash_parse_dt: splash mem child node is not present

Please look into the matter and revert back ASAP.

Thank you,

Deepak


#2

“<6>[ 0.476786] mdss_dsi_panel_init: Panel Name = jdi 1080p video mode dsi panel”

That really doesn’t look right. I wonder if maybe they might have tested those boards with a hard-set panel name?

Try;

press and hold the vol- button while applying power to enter fastboot.
Run command;
fastboot oem select-display-panel adv7533_1080p

Unplug board, plug back in, boot it up, see what happens.

Also note: The hdmi cable must be plugged in BEFORE you apply power to the board.


#3

Hi,

Thanks for the reply.

I tried with the command as mentioned by you.
but still HDMI is not working and Panel name also show same as

<6>[ 0.476786] mdss_dsi_panel_init: Panel Name = jdi 1080p video mode dsi panel.

and one more thing i want to tell you that when i run command as mentioned below

fastboot oem select-display-panel adv7533_1080p

and remove power and again apply power then my board still in the fastboot mode.
I don’t know why board still in the fastboot after removing power.

Regards,
Deepak


#4

Hi all,

Finallly HDMI issue with the Blue PCB DragonBoard is solved.
HDMI is working with DragonBoard 410C Blue PCB.
but I am not getting exactly same HDMI result as with Red Board PCB.

Only Difference with Blue PCB v/s RED PCB is SOC.
In RED Board, SOC is MSM8916(SBC) and in Blue board, SOC is APQ8016(MTP).
so Board is is different for both boards.

so , is board id effect the Panel resoution ???

Regards,
Deepak


#5

I have two red boards, one with APQ and the other with MSM. The chips are identical, except that those branded APQ failed certain tests on the MSM components, which were subsequently disabled (fuse bits). This process is called “binning”. The pins required to make use of the MSM components are NOT CONNECTED in either case, so it doesn’t matter.

The reason why there are boards with MSM components, is because the fab where the chips are produced is yielding higher ratio of MSM components than what is supported by the demand for APQ components, they are therefore filling in the APQ shortfall with MSM.

In this application, there is ABSOLUTELY NO DIFFERENCE between MSM and APQ chips.

Both of my boards provide identical output.

There are precisely two HDMI output modes possible on these boards; 1920x1080 and 1280x720. Any other output resolution required custom kernel modification.