Enabling uart on blsp10

Products Support DragonBoard 820c
#1

I am running linux on a dragonboard820c (yocto).
I am trying to enable a uart on blsp10, I have updated the device tree with the following patch:

Index: kernel-source/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
===================================================================
--- kernel-source.orig/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ kernel-source/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -23,7 +23,7 @@
/ {
    aliases {
            serial0 = &blsp2_uart1;
-              serial1 = &blsp2_uart2;
+              serial1 = &blsp2_uart3;
            serial2 = &blsp1_uart1;
            i2c0    = &blsp1_i2c2;
            i2c1    = &blsp2_i2c1;
@@ -85,13 +85,13 @@
                    pinctrl-1 = <&blsp2_uart1_2pins_sleep>;
            };

-//            serial@75b1000 {
-//                    label = "LS-UART0";
-//                    status = "okay";
-//                    pinctrl-names = "default", "sleep";
-//                    pinctrl-0 = <&blsp2_uart2_4pins_default>;
-//                    pinctrl-1 = <&blsp2_uart2_4pins_sleep>;
-//            };
+              serial@75b2000 {
+                      label = "LS-UART0";
+                      status = "okay";
+                      pinctrl-names = "default", "sleep";
+                      pinctrl-0 = <&blsp2_uart3_2pins_default>;
+                      pinctrl-1 = <&blsp2_uart3_2pins_sleep>;
+              };

            i2c@07577000 {
            /* On Low speed expansion */
Index: kernel-source/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
===================================================================
--- kernel-source.orig/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
+++ kernel-source/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
@@ -265,6 +265,32 @@
            };
    };

+      blsp2_uart3_2pins_default: blsp2_uart3_2pins {
+              pinmux {
+                      function = "blsp_uart10";
+                      pins = "gpio8", "gpio9";
+              };
+
+              pinconf {
+                      pins = "gpio8", "gpio9";
+                      drive-strength = <16>;
+                      bias-disable;
+              };
+      };
+
+      blsp2_uart3_2pins_sleep: blsp2_uart3_2pins_sleep {
+              pinmux {
+                      function = "gpio";
+                      pins = "gpio8", "gpio9";
+              };
+
+              pinconf {
+                      pins = "gpio8", "gpio9";
+                      drive-strength = <2>;
+                      bias-disable;
+              };
+      };
+
    blsp2_spi5_default: blsp2_spi5_default {
            pinmux {
                    function = "blsp_spi12";
Index: kernel-source/arch/arm64/boot/dts/qcom/msm8996.dtsi
===================================================================
--- kernel-source.orig/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ kernel-source/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -787,6 +787,16 @@
                    status = "disabled";
            };

+              blsp2_uart3: serial@75b2000 {
+                      compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                      reg = <0x75b2000 0x1000>;
+                      interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+                      clocks = <&gcc GCC_BLSP2_UART4_APPS_CLK>,
+                               <&gcc GCC_BLSP2_AHB_CLK>;
+                      clock-names = "core", "iface";
+                      status = "disabled";
+              };
+
            blsp2_spi5: spi@075ba000{
                    compatible = "qcom,spi-qup-v2.2.1";
                    reg = <0x075ba000 0x600>;

This seems to enable the port but when I try to boot the kernel it hangs after that port is initialized here is the serial console log:
[ 1.474817] gpio-clk clocks:divclk1: could not find pctldev for node /soc/qcom,spmi@400f000/pmic@0/gpios@c000/clk_div1, deferring probe
[ 1.508847] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 1.513345] SuperH (H)SCI(F) driver initialized
[ 1.514616] msm_serial 7570000.serial: msm_serial: detected port #2
[ 1.514681] msm_serial 7570000.serial: uartclk = 19200000
[ 1.514776] 7570000.serial: ttyMSM2 at MMIO 0x7570000 (irq = 9, base_baud = 1200000) is a MSM
[ 1.515092] serial serial0: tty port ttyMSM2 registered
[ 1.515619] msm_serial 75b0000.serial: msm_serial: detected port #0
[ 1.515688] msm_serial 75b0000.serial: uartclk = 7372800
[ 1.515857] 75b0000.serial: ttyMSM0 at MMIO 0x75b0000 (irq = 12, base_baud = 460800) is a MSM
[ 1.515900] msm_serial: console setup on port #0
[ 2.993581] console [ttyMSM0] enabled
[ 2.999347] msm_serial 75b1000.serial: msm_serial: detected port #1
[ 3.001890] msm_serial 75b1000.serial: uartclk = 19200000
[ 3.007974] 75b1000.serial: ttyMSM1 at MMIO 0x75b1000 (irq = 14, base_baud = 1200000) is a MSM

Format: Log Type - Time(microsec) - Message - Optional Info
Log Type: B - Since Boot(Power On Reset), D - Delta, S - Statistic
S - QC_IMAGE_VERSION_STRING=BOOT.XF.1.0-00301
S - IMAGE_VARIANT_STRING=M8996LAB
S - OEM_IMAGE_VERSION_STRING=crm-ubuntu68
S - Boot Interface: UFS
S - Secure Boot: Off
S - Boot Config @ 0x00076044 = 0x000001c9
S - JTAG ID @ 0x000760f4 = 0x4003e0e1
S - OEM ID @ 0x000760f8 = 0x00000000
S - Serial Number @ 0x00074138 = 0x5373a4d1
S - OEM Config Row 0 @ 0x00074188 = 0x0000000000000000
S - OEM Config Row 1 @ 0x00074190 = 0x0000000000000000
S - Feature Config Row 0 @ 0x000741a0 = 0x0050000010000100
S - Feature Config Row 1 @ 0x000741a8 = 0x00fff00001ffffff
S - Core 0 Frequency, 1228 MHz
B - 0 - PBL, Start
B - 10413 - bootable_media_detect_entry, Start
B - 46012 - bootable_media_detect_success, Start
B - 46016 - elf_loader_entry, Start
B - 47063 - auth_hash_seg_entry, Start
B - 47166 - auth_hash_seg_exit, Start
B - 79138 - elf_segs_hash_verify_entry, Start
B - 81638 - PBL, End
B - 83783 - SBL1, Start
B - 179919 - usb: hs_phy_nondrive_start
B - 180285 - usb: PLL lock success - 0x3
B - 183274 - usb: hs_phy_nondrive_finish
B - 187392 - boot_flash_init, Start
D - 30 - boot_flash_init, Delta
B - 194529 - sbl1_ddr_set_default_params, Start
D - 0 - sbl1_ddr_set_default_params, Delta
B - 202520 - boot_config_data_table_init, Start
D - 191387 - boot_config_data_table_init, Delta - (60 Bytes)
B - 398421 - CDT Version:3,Platform ID:24,Major ID:1,Minor ID:0,Subtype:0
B - 403149 - Image Load, Start
D - 22265 - PMIC Image Loaded, Delta - (37272 Bytes)
B - 425444 - pm_device_init, Start
B - 431209 - PON REASON:PM0:0x200020021 PM1:0x200020021
B - 467626 - PM_SET_VAL:Skip
D - 40016 - pm_device_init, Delta
B - 469547 - pm_driver_init, Start
D - 2928 - pm_driver_init, Delta
B - 476135 - pm_sbl_chg_init, Start
D - 91 - pm_sbl_chg_init, Delta
B - 482906 - vsense_init, Start
D - 0 - vsense_init, Delta
B - 490775 - Pre_DDR_clock_init, Start
D - 366 - Pre_DDR_clock_init, Delta
B - 496509 - ddr_initialize_device, Start
B - 500200 - 8996 v3.x detected, Max frequency = 1.8 GHz
B - 507794 - ddr_initialize_device, Delta
B - 509807 - Basic DDR tests done
B - 2070523 - clock_init, Start
D - 274 - clock_init, Delta
B - 2072536 - Image Load, Start
D - 6222 - QSEE Dev Config Image Loaded, Delta - (46008 Bytes)
B - 2079124 - Image Load, Start
D - 5551 - APDP Image Loaded, Delta - (0 Bytes)
B - 2108892 - usb: fedl, vbus_low
B - 2108953 - Image Load, Start
D - 10766 - XBLRamDump Image Loaded, Delta - (342782 Bytes)
B - 2174314 - usb: init start
B - 2176144 - usb: PLL lock success , 0x2
B - 2195786 - usb: FULL , 0x900e

#2

Hi all,
@Loic

Looking for the same issue, Can you give some pointers to register the uart configured newly.

Regards,
Ajith.

#3

Wasn’t this already answered here?

I don’t think anyone on the forum can help move peripherals between security domains. You need to talk to whoever you buy the chip from (since they have access to and change the bootloader configuration).

#4

Hi,

We have used those GPIOs for configuring i2c over blsp. This seems more like a issue in the UART driver.

Regards,
Ajith.

#5

It’s not about GPIO, but accessing a register (uart controller register) that is not allowed from non secure world.

#6

This might suggest an option;

#7

Hi @Ajith_Kumaresh

When I worked at Qualcomm I wrote a document that had exactly the information you are looking for in it.

The pinout spreadsheet has a table that shows which processor or sub-system a BSLP is assigned to. If you take a look at the 410 spreadsheet (LM80-P0436-6) you can see the format of the information, unfortunately the 410 table doesn’t apply to the 820.

The document you want is LM80-P2751-2 APQ8096SG Pin Assignment Spreadsheet. You can see a reference to the document in the APQ8096SG Device Specification (LM80-P2751-1) but I was unable to find this document anywhere online. I suspect your vendor can get you a copy of the document.

Because BLSP 10 is not used on the 820c DragonBoard (see the schematic LM25-P2751-1) my first guess would be they are not accessible from the APPs processor. The pins are accessible by the apps processor, but this doesn’t mean that the blsp behind the pins is. The spreadsheet would tell you one way or the other.

However if you have had I2C running on GPIO8 and GPIO9 then I suspect that the BLSP is accessible by the apps processor and you have a SW issue with the UART driver.

In the 410 chip not all BLSP units had UART inside them, but from memory I think all of the BLSP units in the 820 do have UART in them. But it has been 2 years since I worked on that so I could certainly be wrong.

I am currently spending most of my time writing device drivers for Zephyr.

-Lawrence-

#8

Hi all,

Thanks for your response,

I tried to enable blsp2_uart2 even there we saw board going to Ram Dump mode.
In serial driver msm_serial.c internally bound to serial_core.c the configuration for uart_ports has :
.flags = UPF_BOOT_AUTOCONF
Thus, checking for configurations done on UART on boot up.
Finally, Blsp2_uart2 and Blsp2_uart5 aren’t registered as proper tty device.

Regards,
Ajith.

#9

Hi,

I have sorted the dependencies for BLSP thanks for the right support.
On using tio, was able to read NMEA, is there any existing parser application to display Latitude/Longitude values from the constant GPGGA/GPGLL prints on the UART. Like gpsmon does for the Qcom PDA devices.

Regards :slight_smile:
Yash M J

#10

gpsmon is not QCOM specific, it’s a generic tool capable of parsing nmea strings, either directly from a device (e.g. /dev/ttyS…) or fed by gpsd:
https://manpages.debian.org/testing/gpsd-clients/gpsmon.1.en.html

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