Capture I2S signals

[Ronen]

I’m trying to capture the WS, SCK and DATA0 signals of the I2S using scope.
According to schematic i’m using pins 16, 18 and 20 accordingly (which are going to GPIOs 110, 113, and 114).
I’ve created the the above mentioned GPIOs using the “export” command and set Direction as Out.
I’m using the “aplay” command line for ALSA to play an already made WAV file however nothing is been captured on my scope.
My questions:

1. Can you please explain how to use and configure the I2S?
2. The “aplay -l” list two sound cards on my 410c:
   a. card 1: DB410C, device 0: ADV7533 i2s-hifi-0
   b. card 1: DB410C, device 1: WCD multicodec-1
   Can you please explain about these two?
3. Can you please explain how to configure for Master/Slave?

Thanks,
Ronen

[Mani]

Hi @Ronen,

I am working on a guide to route I2S signals on LS expansion header. Please stay tuned

Thanks,
Mani

[doitright]

You can’t set them as gpio if you want them to work as i2s. Those are fundamentally different functions.

[Ronen]

Hi Mani,

This is great, i’m anticipating for your guide.

Ronen

[Ronen]

Hi @doitright ,
I see. Can you please explain how to capture the I2S signals (FS, CLK, D0) using scope?
Ronen

[Ronen]

I would like to share an informative link with a detailed explanation for the I2S interfaces on the snapdragon 410c.
The below link is a private messaging exchange between @srini and myself. I hope you will find it helpfully for cracking the snapdragon 410c I2S interfaces issue

https://discuss.96boards.org/t/audio-routing-through-ls-expansion-connector/4748/2?u=ronen

@Ronen

[Ronen]

@Mani - i may suggest that you will use the information gave by @srini with your guide.
Do you have an estimation for when it will be published?

[anon91830841]

hi @Ronen,

private discussions are , well, private… so we cannot access them. We really encourage everyone on this forum to use public discussions , especially for technical questions and support! These forums so far are very open minded, there is no wrong question to ask publicly!

Please get Srini’s agreement, and repost your conversation here, so that it can benefit everyone!

thanks!

[Ronen]

I’ve tried to share the private conversion only after I got @srini approval. This is fully understood.

Below please find the important section:

@srini

Just bit of information:

There are four internal MI2S hardware interfaces inside LPA_IF and two TLMM external

MI2S hardware interfaces. Also, there are two IO MUX controls that connect four internal

MI2S to internal audio codec and TLMM external MI2S.

It is possible to operate the external MI2S and the internal codec path at the same time.

-By default, the primary internal MI2S (SPKR path) and TER internal MI2S (MIC path)

are occupied by the internal codec.

-SEC internal MI2S can be used for external PA in Half-duplex mode (SPKR path only).

-QUAT internal MI2S can be used for external PA in Full-duplex mode (bi-directional).

To be more clear on your setup…

If you are connecting

GPIO110 as WS

GPIO113 as SCLK

GPIO114 as DATA

These pins belong to External Primary MI2S, comes from Mux of Internal Primary and Internal Secondary MI2S.

You should also notice that:

Primary MI2S is for only playback

Secondary MI2S supports only playback

Teritary MI2S supports only capture

Quatenary MI2S supports both playback and capture.

If you are connecting:

GPIO117 as WS

GPIO118 as SCLK

GPIO119 as DATA

These belong to External Secondary MI2S, this is muxed with both internal Teritary I2S and internal Quatenary I2S

Currently on mainline [1] we already have a configuration which uses below setup.

Internal WCD Codec:

playback - Primary MI2S

capture - Ter MI2S

External HDMI Codec via External Secondary MI2S TLM:

playback - Quat MI2S

In MI2S Master mode, both bit clock and Word Select (WS) are provided by the MSM.

The WS clock is sourced from the bit clock and is set equal to sample rate. Clock

configuration is not required for WS.

In MI2S Slave mode, both bit clock and WS must be provided by a third-party MI2S

device.

The following is for QUAT internal MI2S as Slave mode and external PA as Master

mode LPASS_CSR_GP_IO_MUX_MIC_CTL(0x07702000) is configured to 0x00420000 for QUAT

internal MI2S as Slave mode

1> How to access the device tree in Linaro developer (not a desktop)?

A.You can find device tree sources in kernel.org at apq8016-sbc.dtsi « qcom « dts « boot « arm64 « arch - kernel/git/torvalds/linux.git - Linux kernel source tree

2> How to write a new node (in device tree) to define a new Sound Card to be use with ALSA aplay & arecord?

A> Currently mainline kernel.org already supports this. If you are in a custom apq8016 board, It totally depends on how you is your board setup. But if you are using DB410c, you should have this working.

3> How to capture the I2S signals on the LS expansion connector, simply hooking the logic analyzer probes on pins 16, 18, 20 and 27?

A> You should be able to see these signals if you play on internal codec, and once you add the primary TLMM pins in to pinctrl node , Having said that I never tried that.

4> The I2S over the LS expansion is always Master?

A> You can configure it as master or slave depending on who is suppling the mclk, these needs extra bits setup in mux registers.

thanks,

srini

[Mani]

@Ronen Thanks for sharing the info! I knew the I2S internal structure beforehand but still configuring the mux for LS I2S is a nightmare and I might have an update later this week.

Thanks for your persistence!

-Mani

[Ronen]

Below please find a diagram i sketched to describe the I2S interfaces (based on @srini given information):

I’ll be glad If someone can help in understanding how to do the pinmux and/or the pinctrl node editing through device-tree?

According the below snapshot from snapdragon 410c schematic document - LS expansion connector already mapped to correct GPIOs thus i can’t understand why I2S data isn’t being seen on logic analyzer while ‘aplay’ WAV file on the WDC Internal Codec interface?

Note:
In Green - the HDMI codec lines
In Yellow - the LS expansion connector lines

[RikNL]

Hello @Mani en @Ronen,

I’m too trying to get external I2S routed through the LS I2S interface. Without any luck so far.
@Mani I’m looking forward to your update!

I’m developing on a Dragonboard 410c with Android 6 and the Linux kernel version 3.10.49

I tried the sample stuff from https://developer.qualcomm.com/download/db410c/stereo-connector-and-audio-routing-application-note.pdf
and that worked ok for me. (Using the ‘Audio Mezzanine Board’)
After that I reworked the tinymix (Android shell) commands to do the following:

tinymix “SEC_MI2S_RX Audio Mixer MultiMedia1” 1
tinymix “QUAT_MI2S_RX Audio Mixer MultiMedia1” 1
tinyplay /data/test2.wav

Was guessing, as also stated in this topic that PRI and TERT were used for the internal WCD codec.
Based on that, I concluded that the SEC_MI2S and the QUAT_MI2S should be available at the external I2S busses.

However, I also did not get lucky on getting I2S signals (Primary External I2S), nor on the data line (gp114/J8-20, resp qcom-gp/dragonboard)
nor on the bit-clock line (gp113/J8-18) both lines remained 0V when playing the wav file. Nothing.

What I tried, remove all other pin-func of all relevant lines (gp 110, 113, 114, 115) to only function as
I2S mode. (In kernel/arch/arm64/boot/dts/qcom/msm8916-pinctrl.dtsi) Rebuild, flashed and test. No luck.

What I see in the message above, that a reference is made to
“LPASS_CSR_GP_IO_MUX_MIC_CTL(0x07702000) is configured to 0x00420000 for QUAT”
however, I don’t see any LPASS_CSR of 07702000 stated in the Hardware Register Definition pdf.
Is this some kind of not-documented feature we are trying to get after?

As a conclusion, @Mani, I too looking forward to your tutorial, I understand this is much work.
Can I help? I have a setup with Dragonboard and scope, if you have a register of device-tree for test I
can test it.

Hope somebody finds the answer for this noted I2S bus feature which nobody? gets working.

Kind regards, Rik

[Mani]

Hi @RikNL @Ronen,

Below is the guide I have put together for enabling I2S on Low speed expansion header.

https://github.com/Mani-Sadhasivam/documentation/blob/master/consumer/dragonboard410c/guides/enable-ls-i2s.md#4-testing-ls-i2s-output

Hope this helps!

Thanks,
Mani

[RikNL]

Hi @Mani,

Yes this helps! Thanks for your thorough guide, I’m looking in to it. It clarify’s the primary external i2s port, that is very nice. Thanks for your help!

-Rik

[doitright]

Looks very useful.
Let me ask this question though; since it appears like everything ends up working through the integrated codec, how would you configure it to interact with an external programmable codec, like a PCM1865 ADC or PCM5142 DAC? On a Hikey, I would set it up with simple-audio-card with the codec set to the external codec, which is controlled over i2c. This would allow the external codec to be controlled through alsa or tinymix.

[Mani]

@doitright,

For the case of using external codec to External Primary MI2S, below diff should be sufficient!

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 4c3dda5..0b10036 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -315,7 +315,7 @@
                                         sound-dai = <&lpass MI2S_PRIMARY>;
                                 };
                                 codec {
-                                        sound-dai = <&lpass_codec 0>, <&wcd_codec 0>;
+                                        sound-dai = <&your_codec 0>;
                                 };
                         };

Just define a node for your_codec beforehand. For reference you can see how ADV7533 (adv_bridge) is used.

Thanks,
Mani